| Message ID | 20240717-dispcc-sm8550-fixes-v2-2-5c4a3128c40b@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | cb4c00698f2f27d99a69adcce659370ca286cf2a |
| Headers | show |
| Series | clk: qcom: merge SM8550 and SM8650 display clock controller drivers | expand |
On 17/07/2024 12:04, Dmitry Baryshkov wrote: > clk_dp_ops should only be used for DisplayPort pixel clocks. Use > clk_rcg2_ops for disp_cc_mdss_dptx1_aux_clk_src. > > Fixes: 90114ca11476 ("clk: qcom: add SM8550 DISPCC driver") > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/clk/qcom/dispcc-sm8550.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c > index 954b0f6fcea2..a98230540782 100644 > --- a/drivers/clk/qcom/dispcc-sm8550.c > +++ b/drivers/clk/qcom/dispcc-sm8550.c > @@ -400,7 +400,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx1_aux_clk_src = { > .parent_data = disp_cc_parent_data_0, > .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), > .flags = CLK_SET_RATE_PARENT, > - .ops = &clk_dp_ops, > + .ops = &clk_rcg2_ops, > }, > }; > > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c index 954b0f6fcea2..a98230540782 100644 --- a/drivers/clk/qcom/dispcc-sm8550.c +++ b/drivers/clk/qcom/dispcc-sm8550.c @@ -400,7 +400,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx1_aux_clk_src = { .parent_data = disp_cc_parent_data_0, .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_dp_ops, + .ops = &clk_rcg2_ops, }, };
clk_dp_ops should only be used for DisplayPort pixel clocks. Use clk_rcg2_ops for disp_cc_mdss_dptx1_aux_clk_src. Fixes: 90114ca11476 ("clk: qcom: add SM8550 DISPCC driver") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/dispcc-sm8550.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)