| Message ID | 20240718064925.1846074-10-jamin_lin@aspeedtech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | support ADC and I2C for AST2700 | expand |
On 7/18/24 08:49, Jamin Lin wrote: > Introduce a new ast2700 class to support AST2700. > The I2C bus register memory regions and > I2C bus pool buffer memory regions are discontinuous > and they do not back compatible AST2600. > > Add a new ast2700 i2c class init function to match the > address of I2C bus register and pool buffer from the datasheet. > > An I2C controller registers owns 8KB address space. > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> > --- > hw/i2c/aspeed_i2c.c | 62 +++++++++++++++++++++++++++++++++++++ > include/hw/i2c/aspeed_i2c.h | 1 + > 2 files changed, 63 insertions(+) > > diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c > index c0d3ac3867..29d400ac93 100644 > --- a/hw/i2c/aspeed_i2c.c > +++ b/hw/i2c/aspeed_i2c.c > @@ -1101,6 +1101,41 @@ static void aspeed_i2c_instance_init(Object *obj) > * 0xDA0 ... 0xDBF: Device 14 buffer > * 0xDC0 ... 0xDDF: Device 15 buffer (15 and 16 unused in AST1030) > * 0xDE0 ... 0xDFF: Device 16 buffer > + * > + * Address Definitions (AST2700) > + * 0x000 ... 0x0FF: Global Register > + * 0x100 ... 0x17F: Device 0 > + * 0x1A0 ... 0x1BF: Device 0 buffer > + * 0x200 ... 0x27F: Device 1 > + * 0x2A0 ... 0x2BF: Device 1 buffer > + * 0x300 ... 0x37F: Device 2 > + * 0x3A0 ... 0x3BF: Device 2 buffer > + * 0x400 ... 0x47F: Device 3 > + * 0x4A0 ... 0x4BF: Device 3 buffer > + * 0x500 ... 0x57F: Device 4 > + * 0x5A0 ... 0x5BF: Device 4 buffer > + * 0x600 ... 0x67F: Device 5 > + * 0x6A0 ... 0x6BF: Device 5 buffer > + * 0x700 ... 0x77F: Device 6 > + * 0x7A0 ... 0x7BF: Device 6 buffer > + * 0x800 ... 0x87F: Device 7 > + * 0x8A0 ... 0x8BF: Device 7 buffer > + * 0x900 ... 0x97F: Device 8 > + * 0x9A0 ... 0x9BF: Device 8 buffer > + * 0xA00 ... 0xA7F: Device 9 > + * 0xAA0 ... 0xABF: Device 9 buffer > + * 0xB00 ... 0xB7F: Device 10 > + * 0xBA0 ... 0xBBF: Device 10 buffer > + * 0xC00 ... 0xC7F: Device 11 > + * 0xCA0 ... 0xCBF: Device 11 buffer > + * 0xD00 ... 0xD7F: Device 12 > + * 0xDA0 ... 0xDBF: Device 12 buffer > + * 0xE00 ... 0xE7F: Device 13 > + * 0xEA0 ... 0xEBF: Device 13 buffer > + * 0xF00 ... 0xF7F: Device 14 > + * 0xFA0 ... 0xFBF: Device 14 buffer > + * 0x1000 ... 0x107F: Device 15 > + * 0x10A0 ... 0x10BF: Device 15 buffer > */ > static void aspeed_i2c_realize(DeviceState *dev, Error **errp) > { > @@ -1500,6 +1535,32 @@ static const TypeInfo aspeed_1030_i2c_info = { > .class_init = aspeed_1030_i2c_class_init, > }; > > +static void aspeed_2700_i2c_class_init(ObjectClass *klass, void *data) > +{ > + DeviceClass *dc = DEVICE_CLASS(klass); > + AspeedI2CClass *aic = ASPEED_I2C_CLASS(klass); > + > + dc->desc = "ASPEED 2700 I2C Controller"; > + > + aic->num_busses = 16; > + aic->reg_size = 0x80; > + aic->reg_gap_size = 0x80; > + aic->gap = -1; /* no gap */ > + aic->bus_get_irq = aspeed_2600_i2c_bus_get_irq; > + aic->pool_size = 0x20; > + aic->pool_gap_size = 0xe0; > + aic->pool_base = 0x1a0; > + aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base; > + aic->has_dma = true; > + aic->mem_size = 0x10000; I see an overlap the SLI model. Is this value correct ? Thanks, C. > +} > + > +static const TypeInfo aspeed_2700_i2c_info = { > + .name = TYPE_ASPEED_2700_I2C, > + .parent = TYPE_ASPEED_I2C, > + .class_init = aspeed_2700_i2c_class_init, > +}; > + > static void aspeed_i2c_register_types(void) > { > type_register_static(&aspeed_i2c_bus_info); > @@ -1509,6 +1570,7 @@ static void aspeed_i2c_register_types(void) > type_register_static(&aspeed_2500_i2c_info); > type_register_static(&aspeed_2600_i2c_info); > type_register_static(&aspeed_1030_i2c_info); > + type_register_static(&aspeed_2700_i2c_info); > } > > type_init(aspeed_i2c_register_types) > diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h > index bdaea3207d..4f23dc10c3 100644 > --- a/include/hw/i2c/aspeed_i2c.h > +++ b/include/hw/i2c/aspeed_i2c.h > @@ -31,6 +31,7 @@ > #define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500" > #define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600" > #define TYPE_ASPEED_1030_I2C TYPE_ASPEED_I2C "-ast1030" > +#define TYPE_ASPEED_2700_I2C TYPE_ASPEED_I2C "-ast2700" > OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C) > > #define ASPEED_I2C_NR_BUSSES 16
Hi Cedric, > Subject: Re: [PATCH v1 09/15] hw/i2c/aspeed: Add AST2700 support > > On 7/18/24 08:49, Jamin Lin wrote: > > Introduce a new ast2700 class to support AST2700. > > The I2C bus register memory regions and I2C bus pool buffer memory > > regions are discontinuous and they do not back compatible AST2600. > > > > Add a new ast2700 i2c class init function to match the address of I2C > > bus register and pool buffer from the datasheet. > > > > An I2C controller registers owns 8KB address space. > > > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> > > --- > > hw/i2c/aspeed_i2c.c | 62 > +++++++++++++++++++++++++++++++++++++ > > include/hw/i2c/aspeed_i2c.h | 1 + > > 2 files changed, 63 insertions(+) > > > > diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index > > c0d3ac3867..29d400ac93 100644 > > --- a/hw/i2c/aspeed_i2c.c > > +++ b/hw/i2c/aspeed_i2c.c > > @@ -1101,6 +1101,41 @@ static void aspeed_i2c_instance_init(Object *obj) > > * 0xDA0 ... 0xDBF: Device 14 buffer > > * 0xDC0 ... 0xDDF: Device 15 buffer (15 and 16 unused in AST1030) > > * 0xDE0 ... 0xDFF: Device 16 buffer > > + * > > + * Address Definitions (AST2700) > > + * 0x000 ... 0x0FF: Global Register > > + * 0x100 ... 0x17F: Device 0 > > + * 0x1A0 ... 0x1BF: Device 0 buffer > > + * 0x200 ... 0x27F: Device 1 > > + * 0x2A0 ... 0x2BF: Device 1 buffer > > + * 0x300 ... 0x37F: Device 2 > > + * 0x3A0 ... 0x3BF: Device 2 buffer > > + * 0x400 ... 0x47F: Device 3 > > + * 0x4A0 ... 0x4BF: Device 3 buffer > > + * 0x500 ... 0x57F: Device 4 > > + * 0x5A0 ... 0x5BF: Device 4 buffer > > + * 0x600 ... 0x67F: Device 5 > > + * 0x6A0 ... 0x6BF: Device 5 buffer > > + * 0x700 ... 0x77F: Device 6 > > + * 0x7A0 ... 0x7BF: Device 6 buffer > > + * 0x800 ... 0x87F: Device 7 > > + * 0x8A0 ... 0x8BF: Device 7 buffer > > + * 0x900 ... 0x97F: Device 8 > > + * 0x9A0 ... 0x9BF: Device 8 buffer > > + * 0xA00 ... 0xA7F: Device 9 > > + * 0xAA0 ... 0xABF: Device 9 buffer > > + * 0xB00 ... 0xB7F: Device 10 > > + * 0xBA0 ... 0xBBF: Device 10 buffer > > + * 0xC00 ... 0xC7F: Device 11 > > + * 0xCA0 ... 0xCBF: Device 11 buffer > > + * 0xD00 ... 0xD7F: Device 12 > > + * 0xDA0 ... 0xDBF: Device 12 buffer > > + * 0xE00 ... 0xE7F: Device 13 > > + * 0xEA0 ... 0xEBF: Device 13 buffer > > + * 0xF00 ... 0xF7F: Device 14 > > + * 0xFA0 ... 0xFBF: Device 14 buffer > > + * 0x1000 ... 0x107F: Device 15 > > + * 0x10A0 ... 0x10BF: Device 15 buffer > > */ > > static void aspeed_i2c_realize(DeviceState *dev, Error **errp) > > { > > @@ -1500,6 +1535,32 @@ static const TypeInfo aspeed_1030_i2c_info = { > > .class_init = aspeed_1030_i2c_class_init, > > }; > > > > +static void aspeed_2700_i2c_class_init(ObjectClass *klass, void > > +*data) { > > + DeviceClass *dc = DEVICE_CLASS(klass); > > + AspeedI2CClass *aic = ASPEED_I2C_CLASS(klass); > > + > > + dc->desc = "ASPEED 2700 I2C Controller"; > > + > > + aic->num_busses = 16; > > + aic->reg_size = 0x80; > > + aic->reg_gap_size = 0x80; > > + aic->gap = -1; /* no gap */ > > + aic->bus_get_irq = aspeed_2600_i2c_bus_get_irq; > > + aic->pool_size = 0x20; > > + aic->pool_gap_size = 0xe0; > > + aic->pool_base = 0x1a0; > > + aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base; > > + aic->has_dma = true; > > + aic->mem_size = 0x10000; > > I see an overlap the SLI model. Is this value correct ? > Yes, it is incorrect mem_size value. Will update mem_size to 0x2000(8KB) Thanks for review. Jamin > > > Thanks, > > C. > > > > > +} > > + > > +static const TypeInfo aspeed_2700_i2c_info = { > > + .name = TYPE_ASPEED_2700_I2C, > > + .parent = TYPE_ASPEED_I2C, > > + .class_init = aspeed_2700_i2c_class_init, }; > > + > > static void aspeed_i2c_register_types(void) > > { > > type_register_static(&aspeed_i2c_bus_info); > > @@ -1509,6 +1570,7 @@ static void aspeed_i2c_register_types(void) > > type_register_static(&aspeed_2500_i2c_info); > > type_register_static(&aspeed_2600_i2c_info); > > type_register_static(&aspeed_1030_i2c_info); > > + type_register_static(&aspeed_2700_i2c_info); > > } > > > > type_init(aspeed_i2c_register_types) > > diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h > > index bdaea3207d..4f23dc10c3 100644 > > --- a/include/hw/i2c/aspeed_i2c.h > > +++ b/include/hw/i2c/aspeed_i2c.h > > @@ -31,6 +31,7 @@ > > #define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500" > > #define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600" > > #define TYPE_ASPEED_1030_I2C TYPE_ASPEED_I2C "-ast1030" > > +#define TYPE_ASPEED_2700_I2C TYPE_ASPEED_I2C "-ast2700" > > OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C) > > > > #define ASPEED_I2C_NR_BUSSES 16 ************* Email Confidentiality Notice ******************** 免責聲明: 本信件(或其附件)可能包含機密資訊，並受法律保護。如 台端非指定之收件者，請以電子郵件通知本電子郵件之發送者, 並請立即刪除本電子郵件及其附件和銷毀所有複印件。謝謝您的合作! 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diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index c0d3ac3867..29d400ac93 100644 --- a/hw/i2c/aspeed_i2c.c +++ b/hw/i2c/aspeed_i2c.c @@ -1101,6 +1101,41 @@ static void aspeed_i2c_instance_init(Object *obj) * 0xDA0 ... 0xDBF: Device 14 buffer * 0xDC0 ... 0xDDF: Device 15 buffer (15 and 16 unused in AST1030) * 0xDE0 ... 0xDFF: Device 16 buffer + * + * Address Definitions (AST2700) + * 0x000 ... 0x0FF: Global Register + * 0x100 ... 0x17F: Device 0 + * 0x1A0 ... 0x1BF: Device 0 buffer + * 0x200 ... 0x27F: Device 1 + * 0x2A0 ... 0x2BF: Device 1 buffer + * 0x300 ... 0x37F: Device 2 + * 0x3A0 ... 0x3BF: Device 2 buffer + * 0x400 ... 0x47F: Device 3 + * 0x4A0 ... 0x4BF: Device 3 buffer + * 0x500 ... 0x57F: Device 4 + * 0x5A0 ... 0x5BF: Device 4 buffer + * 0x600 ... 0x67F: Device 5 + * 0x6A0 ... 0x6BF: Device 5 buffer + * 0x700 ... 0x77F: Device 6 + * 0x7A0 ... 0x7BF: Device 6 buffer + * 0x800 ... 0x87F: Device 7 + * 0x8A0 ... 0x8BF: Device 7 buffer + * 0x900 ... 0x97F: Device 8 + * 0x9A0 ... 0x9BF: Device 8 buffer + * 0xA00 ... 0xA7F: Device 9 + * 0xAA0 ... 0xABF: Device 9 buffer + * 0xB00 ... 0xB7F: Device 10 + * 0xBA0 ... 0xBBF: Device 10 buffer + * 0xC00 ... 0xC7F: Device 11 + * 0xCA0 ... 0xCBF: Device 11 buffer + * 0xD00 ... 0xD7F: Device 12 + * 0xDA0 ... 0xDBF: Device 12 buffer + * 0xE00 ... 0xE7F: Device 13 + * 0xEA0 ... 0xEBF: Device 13 buffer + * 0xF00 ... 0xF7F: Device 14 + * 0xFA0 ... 0xFBF: Device 14 buffer + * 0x1000 ... 0x107F: Device 15 + * 0x10A0 ... 0x10BF: Device 15 buffer */ static void aspeed_i2c_realize(DeviceState *dev, Error **errp) { @@ -1500,6 +1535,32 @@ static const TypeInfo aspeed_1030_i2c_info = { .class_init = aspeed_1030_i2c_class_init, }; +static void aspeed_2700_i2c_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + AspeedI2CClass *aic = ASPEED_I2C_CLASS(klass); + + dc->desc = "ASPEED 2700 I2C Controller"; + + aic->num_busses = 16; + aic->reg_size = 0x80; + aic->reg_gap_size = 0x80; + aic->gap = -1; /* no gap */ + aic->bus_get_irq = aspeed_2600_i2c_bus_get_irq; + aic->pool_size = 0x20; + aic->pool_gap_size = 0xe0; + aic->pool_base = 0x1a0; + aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base; + aic->has_dma = true; + aic->mem_size = 0x10000; +} + +static const TypeInfo aspeed_2700_i2c_info = { + .name = TYPE_ASPEED_2700_I2C, + .parent = TYPE_ASPEED_I2C, + .class_init = aspeed_2700_i2c_class_init, +}; + static void aspeed_i2c_register_types(void) { type_register_static(&aspeed_i2c_bus_info); @@ -1509,6 +1570,7 @@ static void aspeed_i2c_register_types(void) type_register_static(&aspeed_2500_i2c_info); type_register_static(&aspeed_2600_i2c_info); type_register_static(&aspeed_1030_i2c_info); + type_register_static(&aspeed_2700_i2c_info); } type_init(aspeed_i2c_register_types) diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h index bdaea3207d..4f23dc10c3 100644 --- a/include/hw/i2c/aspeed_i2c.h +++ b/include/hw/i2c/aspeed_i2c.h @@ -31,6 +31,7 @@ #define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500" #define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600" #define TYPE_ASPEED_1030_I2C TYPE_ASPEED_I2C "-ast1030" +#define TYPE_ASPEED_2700_I2C TYPE_ASPEED_I2C "-ast2700" OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C) #define ASPEED_I2C_NR_BUSSES 16
Introduce a new ast2700 class to support AST2700. The I2C bus register memory regions and I2C bus pool buffer memory regions are discontinuous and they do not back compatible AST2600. Add a new ast2700 i2c class init function to match the address of I2C bus register and pool buffer from the datasheet. An I2C controller registers owns 8KB address space. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> --- hw/i2c/aspeed_i2c.c | 62 +++++++++++++++++++++++++++++++++++++ include/hw/i2c/aspeed_i2c.h | 1 + 2 files changed, 63 insertions(+)