| Message ID | 20240719131722.8343-6-johan+linaro@kernel.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: qcom: x1e80100: PCIe fixes and CRD modem support | expand |
On 19.07.2024 3:17 PM, Johan Hovold wrote: > Add the missing PCIe4 perst, wake and clkreq GPIOs. > > Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") > Cc: stable@vger.kernel.org # 6.9 > Signed-off-by: Johan Hovold <johan+linaro@kernel.org> > --- > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 29 +++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > index 7406f1ad9c55..72d9feec907b 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > @@ -784,6 +784,12 @@ &mdss_dp3_phy { > }; > > &pcie4 { > + perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie4_default>; property-n property-names please Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On Fri, Jul 19, 2024 at 08:36:33PM +0200, Konrad Dybcio wrote: > On 19.07.2024 3:17 PM, Johan Hovold wrote: > > Add the missing PCIe4 perst, wake and clkreq GPIOs. > > > > Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") > > Cc: stable@vger.kernel.org # 6.9 > > Signed-off-by: Johan Hovold <johan+linaro@kernel.org> > > --- > > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 29 +++++++++++++++++++++++ > > 1 file changed, 29 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > > index 7406f1ad9c55..72d9feec907b 100644 > > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > > @@ -784,6 +784,12 @@ &mdss_dp3_phy { > > }; > > > > &pcie4 { > > + perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; > > + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; > > + > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pcie4_default>; > > property-n > property-names This would make the x1e80100 pcie nodes inconsistent as this pattern is already used for pcie6a as well as the vast majority of all our upstream devicetrees (13k vs 3k) and bindings. I know this is a pet peeve of yours, but perhaps it's better to just accept this exception (naming multiple pinctrl-N properties is also different from naming individual cells like in reg-names, if you need more motivation). Johan
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 7406f1ad9c55..72d9feec907b 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -784,6 +784,12 @@ &mdss_dp3_phy { }; &pcie4 { + perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie4_default>; + status = "okay"; }; @@ -975,6 +981,29 @@ nvme_reg_en: nvme-reg-en-state { bias-disable; }; + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins = "gpio147"; + function = "pcie4_clk"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio146"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wake-n-pins { + pins = "gpio148"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153";
Add the missing PCIe4 perst, wake and clkreq GPIOs. Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") Cc: stable@vger.kernel.org # 6.9 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+)