Message ID | 20240724091240.67115-2-biju.das.jz@bp.renesas.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Revert "Add missing cache-level properties" | expand |
Hi! > This reverts commit f703a1ddec6a36b67e895921951666e0ffe58c54. > > It is triggering a warning on linux-6.1.y-cip: > "cacheinfo: Unable to detect cache hierarchy for CPU 0" > > Backporting the generic patches may not suitable for > linux-6.1.y-cip. Sorry I missed it before. Can I add your signed-off-by: here? (Not sure it is strictly required for reverts, but...) Best regards, Pavel
Hi Pavel, > -----Original Message----- > From: Pavel Machek <pavel@denx.de> > Sent: Thursday, July 25, 2024 9:10 AM > Subject: Re: [PATCH 6.1.y-cip 1/1] Revert "arm64: dts: renesas: rzg2l: Add missing cache-level > properties" > > Hi! > > > This reverts commit f703a1ddec6a36b67e895921951666e0ffe58c54. > > > > It is triggering a warning on linux-6.1.y-cip: > > "cacheinfo: Unable to detect cache hierarchy for CPU 0" > > > > Backporting the generic patches may not suitable for linux-6.1.y-cip. > > Sorry I missed it before. Can I add your signed-off-by: here? Yes please. Cheers, Biju
Hi! > > > This reverts commit f703a1ddec6a36b67e895921951666e0ffe58c54. > > > > > > It is triggering a warning on linux-6.1.y-cip: > > > "cacheinfo: Unable to detect cache hierarchy for CPU 0" > > > > > > Backporting the generic patches may not suitable for linux-6.1.y-cip. > > > > Sorry I missed it before. Can I add your signed-off-by: here? > > Yes please. Thanks for quick reaction. Applied. Best regards, Pavel
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index f0c1757a794a..427c0746f235 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -31,7 +31,6 @@ L3_CA55: cache-controller-0 { compatible = "cache"; cache-unified; cache-size = <0x40000>; - cache-level = <3>; }; }; diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 87a07a359c57..94867568f46b 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -109,7 +109,6 @@ L3_CA55: cache-controller-0 { compatible = "cache"; cache-unified; cache-size = <0x40000>; - cache-level = <3>; }; }; diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 8f2430c95f07..968dbcd0aa09 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -109,7 +109,6 @@ L3_CA55: cache-controller-0 { compatible = "cache"; cache-unified; cache-size = <0x40000>; - cache-level = <3>; }; };