Message ID | 20240730061638.1831002-4-tariqt@nvidia.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 94a3ad6c081381fa9ee523781789802b4ed00faf |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | mlx5 misc fixes 2024-07-30 | expand |
On 30.07.2024 08:16, Tariq Toukan wrote: > From: Yevgeny Kliteynik <kliteyn@nvidia.com> > > This patch reduces the size of hw_ste_arr_optimized array that is > allocated on stack from 640 bytes (5 match STEs + 5 action STES) > to 448 bytes (2 match STEs + 5 action STES). > This fixes the 'stack guard page was hit' issue, while still fitting > majority of the usecases (up to 2 match STEs). > > Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> > Reviewed-by: Alex Vesker <valex@nvidia.com> > Signed-off-by: Tariq Toukan <tariqt@nvidia.com> > --- Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com> > drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c > index 042ca0349124..d1db04baa1fa 100644 > --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c > +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c > @@ -7,7 +7,7 @@ > /* don't try to optimize STE allocation if the stack is too constaraining */ > #define DR_RULE_MAX_STES_OPTIMIZED 0 > #else > -#define DR_RULE_MAX_STES_OPTIMIZED 5 > +#define DR_RULE_MAX_STES_OPTIMIZED 2 > #endif > #define DR_RULE_MAX_STE_CHAIN_OPTIMIZED (DR_RULE_MAX_STES_OPTIMIZED + DR_ACTION_MAX_STES) >
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c index 042ca0349124..d1db04baa1fa 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c @@ -7,7 +7,7 @@ /* don't try to optimize STE allocation if the stack is too constaraining */ #define DR_RULE_MAX_STES_OPTIMIZED 0 #else -#define DR_RULE_MAX_STES_OPTIMIZED 5 +#define DR_RULE_MAX_STES_OPTIMIZED 2 #endif #define DR_RULE_MAX_STE_CHAIN_OPTIMIZED (DR_RULE_MAX_STES_OPTIMIZED + DR_ACTION_MAX_STES)