| Message ID | 20240627-dpu-virtual-wide-v5-2-5efb90cbb8be@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | drm/msm/dpu: support virtual wide planes | expand |
On 6/26/2024 2:45 PM, Dmitry Baryshkov wrote: > YUV formats require only CSC to be enabled. Even decimated formats > should not require scaler. Relax the requirement and don't check for the > scaler block while checking if YUV format can be enabled. > > Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index 1c3a2657450c..148bd79bdcef 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -743,10 +743,9 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu, > min_src_size = MSM_FORMAT_IS_YUV(fmt) ? 2 : 1; > > if (MSM_FORMAT_IS_YUV(fmt) && > - (!pipe->sspp->cap->sblk->scaler_blk.len || > - !pipe->sspp->cap->sblk->csc_blk.len)) { > + !pipe->sspp->cap->sblk->csc_blk.len) { > DPU_DEBUG_PLANE(pdpu, > - "plane doesn't have scaler/csc for yuv\n"); > + "plane doesn't have csc for yuv\n"); > return -EINVAL; > } > Change seems fine, but one question, is there a chipset in the catalog with a Vig SSPP which has only csc but not scaler? Even qcm2290 has neither scaler nor csc So was this just a code-walkthrough fix or was there any issue hit due to this? >
On Wed, 31 Jul 2024 at 22:36, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: > > > > On 6/26/2024 2:45 PM, Dmitry Baryshkov wrote: > > YUV formats require only CSC to be enabled. Even decimated formats > > should not require scaler. Relax the requirement and don't check for the > > scaler block while checking if YUV format can be enabled. > > > > Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 ++--- > > 1 file changed, 2 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > > index 1c3a2657450c..148bd79bdcef 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > > @@ -743,10 +743,9 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu, > > min_src_size = MSM_FORMAT_IS_YUV(fmt) ? 2 : 1; > > > > if (MSM_FORMAT_IS_YUV(fmt) && > > - (!pipe->sspp->cap->sblk->scaler_blk.len || > > - !pipe->sspp->cap->sblk->csc_blk.len)) { > > + !pipe->sspp->cap->sblk->csc_blk.len) { > > DPU_DEBUG_PLANE(pdpu, > > - "plane doesn't have scaler/csc for yuv\n"); > > + "plane doesn't have csc for yuv\n"); > > return -EINVAL; > > } > > > > Change seems fine, but one question, is there a chipset in the catalog > with a Vig SSPP which has only csc but not scaler? Even qcm2290 has > neither scaler nor csc > > So was this just a code-walkthrough fix or was there any issue hit due > to this? Just a code walkthrough.
On 7/31/2024 5:34 PM, Dmitry Baryshkov wrote: > On Wed, 31 Jul 2024 at 22:36, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: >> >> >> >> On 6/26/2024 2:45 PM, Dmitry Baryshkov wrote: >>> YUV formats require only CSC to be enabled. Even decimated formats >>> should not require scaler. Relax the requirement and don't check for the >>> scaler block while checking if YUV format can be enabled. >>> >>> Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >>> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 ++--- >>> 1 file changed, 2 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c >>> index 1c3a2657450c..148bd79bdcef 100644 >>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c >>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c >>> @@ -743,10 +743,9 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu, >>> min_src_size = MSM_FORMAT_IS_YUV(fmt) ? 2 : 1; >>> >>> if (MSM_FORMAT_IS_YUV(fmt) && >>> - (!pipe->sspp->cap->sblk->scaler_blk.len || >>> - !pipe->sspp->cap->sblk->csc_blk.len)) { >>> + !pipe->sspp->cap->sblk->csc_blk.len) { >>> DPU_DEBUG_PLANE(pdpu, >>> - "plane doesn't have scaler/csc for yuv\n"); >>> + "plane doesn't have csc for yuv\n"); >>> return -EINVAL; >>> } >>> >> >> Change seems fine, but one question, is there a chipset in the catalog >> with a Vig SSPP which has only csc but not scaler? Even qcm2290 has >> neither scaler nor csc >> >> So was this just a code-walkthrough fix or was there any issue hit due >> to this? > > Just a code walkthrough. > Alright, Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 1c3a2657450c..148bd79bdcef 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -743,10 +743,9 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu, min_src_size = MSM_FORMAT_IS_YUV(fmt) ? 2 : 1; if (MSM_FORMAT_IS_YUV(fmt) && - (!pipe->sspp->cap->sblk->scaler_blk.len || - !pipe->sspp->cap->sblk->csc_blk.len)) { + !pipe->sspp->cap->sblk->csc_blk.len) { DPU_DEBUG_PLANE(pdpu, - "plane doesn't have scaler/csc for yuv\n"); + "plane doesn't have csc for yuv\n"); return -EINVAL; }
YUV formats require only CSC to be enabled. Even decimated formats should not require scaler. Relax the requirement and don't check for the scaler block while checking if YUV format can be enabled. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)