| Message ID | 20240808100024.317497-2-abin.joseph@amd.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 36545c6a68b858671cfeb71df682e8cc58b082da |
| Headers | show |
| Series | Add support for ADMA | expand |
On 08/08/2024 12:00, Abin Joseph wrote: > Add compatible string "amd,versal2-dma-1.0" to support AMD Versal Gen 2 > platform. > > AMD Versal Gen 2 has 8 LPD DMA IPs in PS that can be used as general > purpose DMAs which is designed to support memory to memory and memory to > IO buffer transfer. Versal Gen 2 DMA IP has different interrupt register > offset. > > Signed-off-by: Abin Joseph <abin.joseph@amd.com> > --- Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml index 769ce23aaac2..ac3198953b8e 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml +++ b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml @@ -24,7 +24,9 @@ properties: const: 1 compatible: - const: xlnx,zynqmp-dma-1.0 + enum: + - amd,versal2-dma-1.0 + - xlnx,zynqmp-dma-1.0 reg: description: memory map for gdma/adma module access
Add compatible string "amd,versal2-dma-1.0" to support AMD Versal Gen 2 platform. AMD Versal Gen 2 has 8 LPD DMA IPs in PS that can be used as general purpose DMAs which is designed to support memory to memory and memory to IO buffer transfer. Versal Gen 2 DMA IP has different interrupt register offset. Signed-off-by: Abin Joseph <abin.joseph@amd.com> --- Changes in v2: - Rearrange the order of compatible. - Remove example binding documentation. --- .../devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)