diff mbox series

[v3] arm64: dts: imx8mm-emtop-baseboard: Add Ethernet Support

Message ID 20240725122522.5030-1-tarang.raval@siliconsignals.io (mailing list archive)
State New
Headers show
Series [v3] arm64: dts: imx8mm-emtop-baseboard: Add Ethernet Support | expand

Commit Message

Tarang Raval July 25, 2024, 12:25 p.m. UTC 
Add ethernet support for emtop imx8mm basboard

Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io>
---
Change in V3

	1. Add appropriate commit
	2. Add Changelog at correct place

Change in V2

        1. Add Board name into subject
        2. Remove below properties
        - at803x,eee-disabled;
        - at803x,vddio-1p8v;
---
 .../dts/freescale/imx8mm-emtop-baseboard.dts  | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)

Comments

Tarang Raval Aug. 5, 2024, 10:12 a.m. UTC | #1 
As per your comments on v2 patch I have shared an updated version of the patch (v3-0001-arm64-dts-imx8mm-emtop-baseboard-Add-Ethernet-Sup.patch) with the recommended corrections.
is there any updates on this patch?

Best regards, 
Tarang
Tarang Raval Aug. 9, 2024, noon UTC | #2 
I wanted to kindly follow up on the status of my patch submission. Please let me know if there are any updates.

Best regards,
Tarang
Shawn Guo Aug. 13, 2024, 2:14 a.m. UTC | #3 
On Thu, Jul 25, 2024 at 05:55:22PM +0530, Tarang Raval wrote:
> Add ethernet support for emtop imx8mm basboard

s/basboard/baseboard

Fixed it up and applied the patch, thanks!

Shawn

> 
> Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
index 1c4e4d175989..7d2cb74c64ee 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
@@ -11,5 +11,53 @@  / {
 	model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1";
 	compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som",
 		"fsl,imx8mm";
+};
+
+&fec1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fec1>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+	fsl,magic-packet;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@4 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <4>;
+			reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+			reset-assert-us = <10000>;
+			vddio-supply = <&vddio>;
+
+			vddio: vddio-regulator {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+			};
+		};
+	};
+};
 
+&iomuxc {
+	pinctrl_fec1: fec1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
+			MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
+			MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
+			MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
+			MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
+			MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
+			MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
+			MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
+			MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
+			MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
+			MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
+			MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
+			MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
+			MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
+			MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22                0x19
+		>;
+	};
 };