Message ID | 20240621-loongson3-ipi-follow-v2-0-848eafcbb67e@flygoat.com (mailing list archive) |
---|---|
Headers | show |
Series | MIPS misc patches | expand |
On 21/6/24 15:11, Jiaxun Yang wrote: > Jiaxun Yang (3): > hw/mips/loongson3_virt: Store core_iocsr into LoongsonMachineState > hw/mips/loongson3_virt: Fix condition of IPI IOCSR connection > linux-user/mips64: Use MIPS64R2-generic as default CPU type Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On 21/6/24 15:11, Jiaxun Yang wrote: > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > Changes in v2: > - v1 was sent in mistake, b4 messed up with QEMU again > - Link to v1: https://lore.kernel.org/r/20240621-loongson3-ipi-follow-v1-0-c6e73f2b2844@flygoat.com > > --- > Jiaxun Yang (3): > hw/mips/loongson3_virt: Store core_iocsr into LoongsonMachineState > hw/mips/loongson3_virt: Fix condition of IPI IOCSR connection Patches 1 & 2 queued, > linux-user/mips64: Use MIPS64R2-generic as default CPU type patch 3 superseded by https://lore.kernel.org/qemu-devel/20240814133928.6746-4-philmd@linaro.org/ Thanks.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- Changes in v2: - v1 was sent in mistake, b4 messed up with QEMU again - Link to v1: https://lore.kernel.org/r/20240621-loongson3-ipi-follow-v1-0-c6e73f2b2844@flygoat.com --- Jiaxun Yang (3): hw/mips/loongson3_virt: Store core_iocsr into LoongsonMachineState hw/mips/loongson3_virt: Fix condition of IPI IOCSR connection linux-user/mips64: Use MIPS64R2-generic as default CPU type hw/mips/loongson3_virt.c | 5 ++++- linux-user/mips64/target_elf.h | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) --- base-commit: 02d9c38236cf8c9826e5c5be61780c4444cb4ae0 change-id: 20240621-loongson3-ipi-follow-1f4919621882 Best regards,