diff mbox series

arm64: dts: qcom: sm7125-xiaomi-common: Add reset-gpios for ufs_mem_hc

Message ID 20240731182412.27966-1-danila@jiaxyga.com (mailing list archive)
State Accepted
Headers show
Series arm64: dts: qcom: sm7125-xiaomi-common: Add reset-gpios for ufs_mem_hc | expand

Commit Message

Danila Tikhonov July 31, 2024, 6:24 p.m. UTC
The SC7180/SM7125 SoCs have a special pin for UFS reset. Generally, this
pin is the same for all devices on the same SoC because it is hardcoded
in the pinctrl driver. Therefore, it might seem appropriate to add this
pin configuration in sc7180.dtsi. However, this pin is defined in the
device-specific DTS files instead of the SoC-level DTS files in all
Qualcomm DTS. To maintain consistency with this approach, we will follow
the same style.

Add reset-gpios to ufs_mem_hc.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
---
 arch/arm64/boot/dts/qcom/sm7125-xiaomi-common.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Comments

Bjorn Andersson Aug. 15, 2024, 8:40 p.m. UTC | #1
On Wed, 31 Jul 2024 21:24:12 +0300, Danila Tikhonov wrote:
> The SC7180/SM7125 SoCs have a special pin for UFS reset. Generally, this
> pin is the same for all devices on the same SoC because it is hardcoded
> in the pinctrl driver. Therefore, it might seem appropriate to add this
> pin configuration in sc7180.dtsi. However, this pin is defined in the
> device-specific DTS files instead of the SoC-level DTS files in all
> Qualcomm DTS. To maintain consistency with this approach, we will follow
> the same style.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: sm7125-xiaomi-common: Add reset-gpios for ufs_mem_hc
      commit: 0bdadbf5c6fa4b42b33b3fb5595aaf34c5f4390b

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm7125-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/sm7125-xiaomi-common.dtsi
index 29289fa41b13..b9cff60efe6f 100644
--- a/arch/arm64/boot/dts/qcom/sm7125-xiaomi-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm7125-xiaomi-common.dtsi
@@ -411,6 +411,8 @@  sd-cd-pins {
 };
 
 &ufs_mem_hc {
+	reset-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
+
 	vcc-supply = <&vreg_l19a_3p0>;
 	vcc-max-microamp = <600000>;
 	vccq2-supply = <&vreg_l12a_1p8>;