| Message ID | 20240715-sa8775p-mm-v3-v1-7-badaf35ed670@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Add support for SA8775P Multimedia clock controllers | expand |
On 15/07/2024 10:23, Taniya Das wrote: > Add support for video, camera, display0 and display1 clock > controllers on SA8775P platform. > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 56 +++++++++++++++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 23f1b2e5e624..8fd68a8aa916 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -2911,6 +2911,47 @@ llcc: system-cache-controller@9200000 { > interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; > }; > > + videocc: clock-controller@abf0000 { > + compatible = "qcom,sa8775p-videocc"; > + reg = <0x0 0x0abf0000 0x0 0x10000>; > + clocks = <&gcc GCC_VIDEO_AHB_CLK>, > + <&rpmhcc RPMH_CXO_CLK>, > + <&rpmhcc RPMH_CXO_CLK_A>, > + <&sleep_clk>; > + power-domains = <&rpmhpd SA8775P_MMCX>; Not sure if these are correct. I had impression the clocks are going away from sa8775p? Best regards, Krzysztof
On 16.07.2024 9:45 AM, Krzysztof Kozlowski wrote: > On 15/07/2024 10:23, Taniya Das wrote: >> Add support for video, camera, display0 and display1 clock >> controllers on SA8775P platform. >> >> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 56 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 56 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> index 23f1b2e5e624..8fd68a8aa916 100644 >> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> @@ -2911,6 +2911,47 @@ llcc: system-cache-controller@9200000 { >> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + videocc: clock-controller@abf0000 { >> + compatible = "qcom,sa8775p-videocc"; >> + reg = <0x0 0x0abf0000 0x0 0x10000>; >> + clocks = <&gcc GCC_VIDEO_AHB_CLK>, >> + <&rpmhcc RPMH_CXO_CLK>, >> + <&rpmhcc RPMH_CXO_CLK_A>, >> + <&sleep_clk>; >> + power-domains = <&rpmhpd SA8775P_MMCX>; > > Not sure if these are correct. I had impression the clocks are going > away from sa8775p? Right, the patches look mostly good, but are still going to be on hold until the 8775 situation is cleared out.. We recently had the gigantic patchset [1] that shifted things around, and seemingly there was rather little closure on that, so we're waiting for the dust to settle and people to agree on things.. Konrad [1] https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/
On 7/16/2024 8:09 PM, Konrad Dybcio wrote: > On 16.07.2024 9:45 AM, Krzysztof Kozlowski wrote: >> On 15/07/2024 10:23, Taniya Das wrote: >>> Add support for video, camera, display0 and display1 clock >>> controllers on SA8775P platform. >>> >>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 56 +++++++++++++++++++++++++++++++++++ >>> 1 file changed, 56 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> index 23f1b2e5e624..8fd68a8aa916 100644 >>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> @@ -2911,6 +2911,47 @@ llcc: system-cache-controller@9200000 { >>> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >>> }; >>> >>> + videocc: clock-controller@abf0000 { >>> + compatible = "qcom,sa8775p-videocc"; >>> + reg = <0x0 0x0abf0000 0x0 0x10000>; >>> + clocks = <&gcc GCC_VIDEO_AHB_CLK>, >>> + <&rpmhcc RPMH_CXO_CLK>, >>> + <&rpmhcc RPMH_CXO_CLK_A>, >>> + <&sleep_clk>; >>> + power-domains = <&rpmhpd SA8775P_MMCX>; >> >> Not sure if these are correct. I had impression the clocks are going >> away from sa8775p? > > Right, the patches look mostly good, but are still going to be on hold > until the 8775 situation is cleared out.. We recently had the gigantic > patchset [1] that shifted things around, and seemingly there was rather > little closure on that, so we're waiting for the dust to settle and > people to agree on things.. > > Konrad > > [1] https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ After considering the feedback provided on the subject, We have decided to keep current SA8775p compatible and ABI compatibility in drivers. Therefore, this patch is still needed, please continue to review this patch. Thank you for your input.
On 7/29/2024 4:12 PM, Tengfei Fan wrote: > > > On 7/16/2024 8:09 PM, Konrad Dybcio wrote: >> On 16.07.2024 9:45 AM, Krzysztof Kozlowski wrote: >>> On 15/07/2024 10:23, Taniya Das wrote: >>>> Add support for video, camera, display0 and display1 clock >>>> controllers on SA8775P platform. >>>> >>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 56 >>>> +++++++++++++++++++++++++++++++++++ >>>> 1 file changed, 56 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>>> b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>>> index 23f1b2e5e624..8fd68a8aa916 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>>> @@ -2911,6 +2911,47 @@ llcc: system-cache-controller@9200000 { >>>> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; >>>> }; >>>> + videocc: clock-controller@abf0000 { >>>> + compatible = "qcom,sa8775p-videocc"; >>>> + reg = <0x0 0x0abf0000 0x0 0x10000>; >>>> + clocks = <&gcc GCC_VIDEO_AHB_CLK>, >>>> + <&rpmhcc RPMH_CXO_CLK>, >>>> + <&rpmhcc RPMH_CXO_CLK_A>, >>>> + <&sleep_clk>; >>>> + power-domains = <&rpmhpd SA8775P_MMCX>; >>> >>> Not sure if these are correct. I had impression the clocks are going >>> away from sa8775p? >> >> Right, the patches look mostly good, but are still going to be on hold >> until the 8775 situation is cleared out.. We recently had the gigantic >> patchset [1] that shifted things around, and seemingly there was rather >> little closure on that, so we're waiting for the dust to settle and >> people to agree on things.. >> >> Konrad >> >> [1] >> https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ > > After considering the feedback provided on the subject, We have decided > to keep current SA8775p compatible and ABI compatibility in drivers. > Therefore, this patch is still needed, please continue to review this > patch. > Thank you for your input. > Thank you Tengfei, I will post the patches again.
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 23f1b2e5e624..8fd68a8aa916 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -2911,6 +2911,47 @@ llcc: system-cache-controller@9200000 { interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; }; + videocc: clock-controller@abf0000 { + compatible = "qcom,sa8775p-videocc"; + reg = <0x0 0x0abf0000 0x0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>; + power-domains = <&rpmhpd SA8775P_MMCX>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + + camcc: clock-controller@ade0000 { + compatible = "qcom,sa8775p-camcc"; + reg = <0x0 0x0ade0000 0x0 0x20000>; + clocks = <&gcc GCC_CAMERA_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>; + power-domains = <&rpmhpd SA8775P_MMCX>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + + dispcc0: clock-controller@af00000 { + compatible = "qcom,sa8775p-dispcc0"; + reg = <0x0 0x0af00000 0x0 0x20000>; + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <0>, <0>, <0>, <0>, + <0>, <0>, <0>, <0>; + power-domains = <&rpmhpd SA8775P_MMCX>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,sa8775p-pdc", "qcom,pdc"; reg = <0x0 0x0b220000 0x0 0x30000>, @@ -3445,6 +3486,21 @@ cpufreq_hw: cpufreq@18591000 { #freq-domain-cells = <1>; }; + dispcc1: clock-controller@22100000 { + compatible = "qcom,sa8775p-dispcc1"; + reg = <0x0 0x22100000 0x0 0x20000>; + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <0>, <0>, <0>, <0>, + <0>, <0>, <0>, <0>; + power-domains = <&rpmhpd SA8775P_MMCX>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + ethernet1: ethernet@23000000 { compatible = "qcom,sa8775p-ethqos"; reg = <0x0 0x23000000 0x0 0x10000>,
Add support for video, camera, display0 and display1 clock controllers on SA8775P platform. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 56 +++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+)