diff mbox series

[v4,2/4] grf: rk3576: Add default GRF values

Message ID 20240822195706.920567-3-detlev.casanova@collabora.com (mailing list archive)
State New
Headers show
Series Add pinctrl support for rk3576 | expand

Commit Message

Detlev Casanova Aug. 22, 2024, 7:53 p.m. UTC 
Set SW controlled i3c weak pull up and disable JTAG function on SDMMC IO.

The i3c weak pull up is activated to let all gpio banks be controlled
by the pinctrl driver.

Disabling the JTAG function lets the SDMMC core use its full IO width.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
 drivers/soc/rockchip/grf.c | 30 +++++++++++++++++++++++++++++-
 1 file changed, 29 insertions(+), 1 deletion(-)

Comments

Dragan Simic Aug. 23, 2024, 5:20 a.m. UTC | #1 
Hello Detlev,

On 2024-08-22 21:53, Detlev Casanova wrote:
> Set SW controlled i3c weak pull up and disable JTAG function on SDMMC 
> IO.
> 
> The i3c weak pull up is activated to let all gpio banks be controlled
> by the pinctrl driver.
> 
> Disabling the JTAG function lets the SDMMC core use its full IO width.
> 
> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>

Thanks for the patch.  I had a rather detailed look at the patch,
while focusing on having no regressions introduced, and I found none.
So, please feel free to include:

Acked-by: Dragan Simic <dsimic@manjaro.org>

> ---
>  drivers/soc/rockchip/grf.c | 30 +++++++++++++++++++++++++++++-
>  1 file changed, 29 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
> index 5fd62046b28a..4607fc0779e7 100644
> --- a/drivers/soc/rockchip/grf.c
> +++ b/drivers/soc/rockchip/grf.c
> @@ -121,6 +121,29 @@ static const struct rockchip_grf_info
> rk3566_pipegrf __initconst = {
>  	.num_values = ARRAY_SIZE(rk3566_defaults),
>  };
> 
> +#define RK3576_SYSGRF_SOC_CON1		0x0004
> +
> +static const struct rockchip_grf_value rk3576_defaults_sys_grf[]
> __initconst = {
> +	{ "i3c0 weakpull", RK3576_SYSGRF_SOC_CON1, HIWORD_UPDATE(3, 3, 6) },
> +	{ "i3c1 weakpull", RK3576_SYSGRF_SOC_CON1, HIWORD_UPDATE(3, 3, 8) },
> +};
> +
> +static const struct rockchip_grf_info rk3576_sysgrf __initconst = {
> +	.values = rk3576_defaults_sys_grf,
> +	.num_values = ARRAY_SIZE(rk3576_defaults_sys_grf),
> +};
> +
> +#define RK3576_IOCGRF_MISC_CON		0x04F0
> +
> +static const struct rockchip_grf_value rk3576_defaults_ioc_grf[]
> __initconst = {
> +	{ "jtag switching", RK3576_IOCGRF_MISC_CON, HIWORD_UPDATE(0, 1, 1) },
> +};
> +
> +static const struct rockchip_grf_info rk3576_iocgrf __initconst = {
> +	.values = rk3576_defaults_ioc_grf,
> +	.num_values = ARRAY_SIZE(rk3576_defaults_ioc_grf),
> +};
> +
>  #define RK3588_GRF_SOC_CON6		0x0318
> 
>  static const struct rockchip_grf_value rk3588_defaults[] __initconst = 
> {
> @@ -132,7 +155,6 @@ static const struct rockchip_grf_info
> rk3588_sysgrf __initconst = {
>  	.num_values = ARRAY_SIZE(rk3588_defaults),
>  };
> 
> -
>  static const struct of_device_id rockchip_grf_dt_match[] __initconst = 
> {
>  	{
>  		.compatible = "rockchip,rk3036-grf",
> @@ -158,6 +180,12 @@ static const struct of_device_id
> rockchip_grf_dt_match[] __initconst = {
>  	}, {
>  		.compatible = "rockchip,rk3566-pipe-grf",
>  		.data = (void *)&rk3566_pipegrf,
> +	}, {
> +		.compatible = "rockchip,rk3576-sys-grf",
> +		.data = (void *)&rk3576_sysgrf,
> +	}, {
> +		.compatible = "rockchip,rk3576-ioc-grf",
> +		.data = (void *)&rk3576_iocgrf,
>  	}, {
>  		.compatible = "rockchip,rk3588-sys-grf",
>  		.data = (void *)&rk3588_sysgrf,
diff mbox series

Patch

diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
index 5fd62046b28a..4607fc0779e7 100644
--- a/drivers/soc/rockchip/grf.c
+++ b/drivers/soc/rockchip/grf.c
@@ -121,6 +121,29 @@  static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
 	.num_values = ARRAY_SIZE(rk3566_defaults),
 };
 
+#define RK3576_SYSGRF_SOC_CON1		0x0004
+
+static const struct rockchip_grf_value rk3576_defaults_sys_grf[] __initconst = {
+	{ "i3c0 weakpull", RK3576_SYSGRF_SOC_CON1, HIWORD_UPDATE(3, 3, 6) },
+	{ "i3c1 weakpull", RK3576_SYSGRF_SOC_CON1, HIWORD_UPDATE(3, 3, 8) },
+};
+
+static const struct rockchip_grf_info rk3576_sysgrf __initconst = {
+	.values = rk3576_defaults_sys_grf,
+	.num_values = ARRAY_SIZE(rk3576_defaults_sys_grf),
+};
+
+#define RK3576_IOCGRF_MISC_CON		0x04F0
+
+static const struct rockchip_grf_value rk3576_defaults_ioc_grf[] __initconst = {
+	{ "jtag switching", RK3576_IOCGRF_MISC_CON, HIWORD_UPDATE(0, 1, 1) },
+};
+
+static const struct rockchip_grf_info rk3576_iocgrf __initconst = {
+	.values = rk3576_defaults_ioc_grf,
+	.num_values = ARRAY_SIZE(rk3576_defaults_ioc_grf),
+};
+
 #define RK3588_GRF_SOC_CON6		0x0318
 
 static const struct rockchip_grf_value rk3588_defaults[] __initconst = {
@@ -132,7 +155,6 @@  static const struct rockchip_grf_info rk3588_sysgrf __initconst = {
 	.num_values = ARRAY_SIZE(rk3588_defaults),
 };
 
-
 static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
 	{
 		.compatible = "rockchip,rk3036-grf",
@@ -158,6 +180,12 @@  static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
 	}, {
 		.compatible = "rockchip,rk3566-pipe-grf",
 		.data = (void *)&rk3566_pipegrf,
+	}, {
+		.compatible = "rockchip,rk3576-sys-grf",
+		.data = (void *)&rk3576_sysgrf,
+	}, {
+		.compatible = "rockchip,rk3576-ioc-grf",
+		.data = (void *)&rk3576_iocgrf,
 	}, {
 		.compatible = "rockchip,rk3588-sys-grf",
 		.data = (void *)&rk3588_sysgrf,