diff mbox series

[v3,2/2] arm64: dts: renesas: r9a07g043u: Add vspd node

Message ID 20240805131709.101679-3-biju.das.jz@bp.renesas.com (mailing list archive)
State Mainlined
Commit 6bfd974d03a433e7fa9d5444f89851e4e4eb9779
Delegated to: Geert Uytterhoeven
Headers show
Series Add RZ/G2UL {fcpvd, vspd} device nodes | expand

Commit Message

Biju Das Aug. 5, 2024, 1:17 p.m. UTC 
Add vspd node to RZ/G2UL SoC DTSI.

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v2->v3:
 * Reordered the patch as vspd needs fcpvd handle, so added fcpvd node
   first
 * Added Rb tag from Laurent.
v1->v2:
 * No change
---
 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Geert Uytterhoeven Aug. 23, 2024, 9:24 a.m. UTC | #1 
On Mon, Aug 5, 2024 at 3:17 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add vspd node to RZ/G2UL SoC DTSI.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v2->v3:
>  * Reordered the patch as vspd needs fcpvd handle, so added fcpvd node
>    first
>  * Added Rb tag from Laurent.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.12.

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
index c4defdf0fefd..d88bf23b0782 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -129,6 +129,19 @@  csi2cru: endpoint@0 {
 		};
 	};
 
+	vspd: vsp@10870000 {
+		compatible = "renesas,r9a07g043u-vsp2", "renesas,r9a07g044-vsp2";
+		reg = <0 0x10870000 0 0x10000>;
+		interrupts = <SOC_PERIPHERAL_IRQ(149) IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>,
+			 <&cpg CPG_MOD R9A07G043_LCDC_CLK_P>,
+			 <&cpg CPG_MOD R9A07G043_LCDC_CLK_D>;
+		clock-names = "aclk", "pclk", "vclk";
+		power-domains = <&cpg>;
+		resets = <&cpg R9A07G043_LCDC_RESET_N>;
+		renesas,fcp = <&fcpvd>;
+	};
+
 	fcpvd: fcp@10880000 {
 		compatible = "renesas,r9a07g043u-fcpvd", "renesas,fcpv";
 		reg = <0 0x10880000 0 0x10000>;