Message ID | 20240828203721.2751904-2-quic_nkela@quicinc.com (mailing list archive) |
---|---|
State | Not Applicable |
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Wed, 28 Aug 2024 20:38:00 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47SKbwMA014092 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Aug 2024 20:37:58 GMT Received: from hu-nkela-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 28 Aug 2024 13:37:55 -0700 From: Nikunj Kela <quic_nkela@quicinc.com> To: <andersson@kernel.org>, <konradybcio@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <rafael@kernel.org>, <viresh.kumar@linaro.org>, <herbert@gondor.apana.org.au>, <davem@davemloft.net>, <sudeep.holla@arm.com>, <andi.shyti@kernel.org>, <tglx@linutronix.de>, <will@kernel.org>, <joro@8bytes.org>, <jassisinghbrar@gmail.com>, <lee@kernel.org>, <linus.walleij@linaro.org>, <amitk@kernel.org>, <thara.gopinath@gmail.com>, <broonie@kernel.org>, <wim@linux-watchdog.org>, <linux@roeck-us.net> CC: <robin.murphy@arm.com>, <cristian.marussi@arm.com>, <rui.zhang@intel.com>, <lukasz.luba@arm.com>, <vkoul@kernel.org>, <quic_gurus@quicinc.com>, <agross@kernel.org>, <bartosz.golaszewski@linaro.org>, <quic_rjendra@quicinc.com>, <robimarko@gmail.com>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>, <linux-crypto@vger.kernel.org>, <arm-scmi@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-i2c@vger.kernel.org>, <iommu@lists.linux.dev>, <linux-gpio@vger.kernel.org>, <linux-serial@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-watchdog@vger.kernel.org>, <kernel@quicinc.com>, <quic_psodagud@quicinc.com>, <quic_tsoni@quicinc.com>, <quic_shazhuss@quicinc.com>, Nikunj Kela <quic_nkela@quicinc.com> Subject: [PATCH 01/22] dt-bindings: arm: qcom: add the SoC ID for SA8255P Date: Wed, 28 Aug 2024 13:37:00 -0700 Message-ID: <20240828203721.2751904-2-quic_nkela@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240828203721.2751904-1-quic_nkela@quicinc.com> References: <20240828203721.2751904-1-quic_nkela@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: WjCVQhvjndM-WpY62ai6YW6OMKI7zO-Z X-Proofpoint-ORIG-GUID: WjCVQhvjndM-WpY62ai6YW6OMKI7zO-Z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-28_08,2024-08-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=999 bulkscore=0 impostorscore=0 phishscore=0 clxscore=1011 mlxscore=0 spamscore=0 suspectscore=0 malwarescore=0 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408280149 |
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arm64: qcom: Introduce SA8255p Ride platform
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On Wed, Aug 28, 2024 at 01:37:00PM -0700, Nikunj Kela wrote: > Add the SoC ID entry for SA8255P. > > Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> > --- > include/dt-bindings/arm/qcom,ids.h | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index 8332f8d82f96..16f00ecdcc09 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -257,6 +257,7 @@ #define QCOM_ID_QRB2210 524 #define QCOM_ID_SM8475 530 #define QCOM_ID_SM8475P 531 +#define QCOM_ID_SA8255P 532 #define QCOM_ID_SA8775P 534 #define QCOM_ID_QRU1000 539 #define QCOM_ID_SM8475_2 540
Add the SoC ID entry for SA8255P. Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> --- include/dt-bindings/arm/qcom,ids.h | 1 + 1 file changed, 1 insertion(+)