| Message ID | 20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-4-bdb05b4b5a2e@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | drm/msm: Support quad pipe with dual-DSI | expand |
On Thu, 29 Aug 2024 at 13:19, Jun Nie <jun.nie@linaro.org> wrote: > > From: Jonathan Marek <jonathan@marek.ca> > > MSM display controller support multiple slice to be sent in a single DSC > packet. This is not MSM-specific. It is allowed per the standard. > Add a dsc_slice_per_pkt field to mipi_dsi_device struct and > support this field in msm mdss driver. This doesn't describe why this is necessary at all. Is it a fix or a feature? > > Note that the removed "pkt_per_line = slice_per_intf * slice_per_pkt" > comment is incorrect. > > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > Signed-off-by: Jun Nie <jun.nie@linaro.org> > --- > drivers/gpu/drm/msm/dsi/dsi_host.c | 25 ++++++++++--------------- > include/drm/drm_mipi_dsi.h | 2 ++ > 2 files changed, 12 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index 5abade8f26b88..36f0470cdf588 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -157,6 +157,7 @@ struct msm_dsi_host { > > struct drm_display_mode *mode; > struct drm_dsc_config *dsc; > + unsigned int dsc_slice_per_pkt; > > /* connected device info */ > unsigned int channel; > @@ -861,17 +862,10 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod > slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); > > total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; > - bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ > + bytes_per_pkt = dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt; > > eol_byte_num = total_bytes_per_intf % 3; > - > - /* > - * Typically, pkt_per_line = slice_per_intf * slice_per_pkt. > - * > - * Since the current driver only supports slice_per_pkt = 1, > - * pkt_per_line will be equal to slice per intf for now. > - */ > - pkt_per_line = slice_per_intf; > + pkt_per_line = slice_per_intf / msm_host->dsc_slice_per_pkt; > > if (is_cmd_mode) /* packet data type */ > reg = DSI_COMMAND_COMPRESSION_MODE_CTRL_STREAM0_DATATYPE(MIPI_DSI_DCS_LONG_WRITE); > @@ -1019,12 +1013,8 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) > else > /* > * When DSC is enabled, WC = slice_chunk_size * slice_per_pkt + 1. > - * Currently, the driver only supports default value of slice_per_pkt = 1 > - * > - * TODO: Expand mipi_dsi_device struct to hold slice_per_pkt info > - * and adjust DSC math to account for slice_per_pkt. > */ > - wc = msm_host->dsc->slice_chunk_size + 1; > + wc = msm_host->dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt + 1; > > dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL, > DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(wc) | > @@ -1629,8 +1619,13 @@ static int dsi_host_attach(struct mipi_dsi_host *host, > msm_host->lanes = dsi->lanes; > msm_host->format = dsi->format; > msm_host->mode_flags = dsi->mode_flags; > - if (dsi->dsc) > + if (dsi->dsc) { > msm_host->dsc = dsi->dsc; > + msm_host->dsc_slice_per_pkt = dsi->dsc_slice_per_pkt; > + /* for backwards compatibility, assume 1 if not set */ > + if (!msm_host->dsc_slice_per_pkt) > + msm_host->dsc_slice_per_pkt = 1; > + } > > ret = dsi_dev_attach(msm_host->pdev); > if (ret) > diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h > index 0f520eeeaa8e3..1c1b56077d44a 100644 > --- a/include/drm/drm_mipi_dsi.h > +++ b/include/drm/drm_mipi_dsi.h > @@ -182,6 +182,7 @@ struct mipi_dsi_device_info { > * be set to the real limits of the hardware, zero is only accepted for > * legacy drivers > * @dsc: panel/bridge DSC pps payload to be sent > + * @dsc_slice_per_pkt: number of DSC slices to be sent as in a single packet > */ > struct mipi_dsi_device { > struct mipi_dsi_host *host; > @@ -196,6 +197,7 @@ struct mipi_dsi_device { > unsigned long hs_rate; > unsigned long lp_rate; > struct drm_dsc_config *dsc; > + unsigned int dsc_slice_per_pkt; > }; > > /** > > -- > 2.34.1 >
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2024年8月29日周四 19:04写道： > > On Thu, 29 Aug 2024 at 13:19, Jun Nie <jun.nie@linaro.org> wrote: > > > > From: Jonathan Marek <jonathan@marek.ca> > > > > MSM display controller support multiple slice to be sent in a single DSC > > packet. > > This is not MSM-specific. It is allowed per the standard. I do not find it in VESA standard 1.1 and 1.2a. Could you help point me the standard link? > > > Add a dsc_slice_per_pkt field to mipi_dsi_device struct and > > support this field in msm mdss driver. > > This doesn't describe why this is necessary at all. Is it a fix or a feature? It is a feature per the name. But I do not know more than the code from QCOM. And different value other than 1 is needed for some panel with QCOM SoC per test. So I suppose it is a key parameter. Any more idea? >
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 5abade8f26b88..36f0470cdf588 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -157,6 +157,7 @@ struct msm_dsi_host { struct drm_display_mode *mode; struct drm_dsc_config *dsc; + unsigned int dsc_slice_per_pkt; /* connected device info */ unsigned int channel; @@ -861,17 +862,10 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; - bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ + bytes_per_pkt = dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt; eol_byte_num = total_bytes_per_intf % 3; - - /* - * Typically, pkt_per_line = slice_per_intf * slice_per_pkt. - * - * Since the current driver only supports slice_per_pkt = 1, - * pkt_per_line will be equal to slice per intf for now. - */ - pkt_per_line = slice_per_intf; + pkt_per_line = slice_per_intf / msm_host->dsc_slice_per_pkt; if (is_cmd_mode) /* packet data type */ reg = DSI_COMMAND_COMPRESSION_MODE_CTRL_STREAM0_DATATYPE(MIPI_DSI_DCS_LONG_WRITE); @@ -1019,12 +1013,8 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) else /* * When DSC is enabled, WC = slice_chunk_size * slice_per_pkt + 1. - * Currently, the driver only supports default value of slice_per_pkt = 1 - * - * TODO: Expand mipi_dsi_device struct to hold slice_per_pkt info - * and adjust DSC math to account for slice_per_pkt. */ - wc = msm_host->dsc->slice_chunk_size + 1; + wc = msm_host->dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt + 1; dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL, DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(wc) | @@ -1629,8 +1619,13 @@ static int dsi_host_attach(struct mipi_dsi_host *host, msm_host->lanes = dsi->lanes; msm_host->format = dsi->format; msm_host->mode_flags = dsi->mode_flags; - if (dsi->dsc) + if (dsi->dsc) { msm_host->dsc = dsi->dsc; + msm_host->dsc_slice_per_pkt = dsi->dsc_slice_per_pkt; + /* for backwards compatibility, assume 1 if not set */ + if (!msm_host->dsc_slice_per_pkt) + msm_host->dsc_slice_per_pkt = 1; + } ret = dsi_dev_attach(msm_host->pdev); if (ret) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 0f520eeeaa8e3..1c1b56077d44a 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -182,6 +182,7 @@ struct mipi_dsi_device_info { * be set to the real limits of the hardware, zero is only accepted for * legacy drivers * @dsc: panel/bridge DSC pps payload to be sent + * @dsc_slice_per_pkt: number of DSC slices to be sent as in a single packet */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -196,6 +197,7 @@ struct mipi_dsi_device { unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; + unsigned int dsc_slice_per_pkt; }; /**