| Message ID | 20240830130218.3377060-3-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add RTC support for the Renesas RZ/G3S SoC | expand |
On Fri, Aug 30, 2024 at 04:02:08PM +0300, Claudiu wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > The VBATTB controllers controls the clock for the RTC on the Renesas > RZ/G3S. The HW block diagram for the clock logic is as follows: > > +----------+ XC `\ > RTXIN --->| |----->| \ +----+ VBATTCLK > | 32K clock| | |----->|gate|-----------> > | osc | XBYP | | +----+ > RTXOUT --->| |----->| / > +----------+ ,/ > > One could connect as input to this HW block either a crystal oscillator or > an external clock device. > > After discussions w/ Stephen Boyd the clock tree associated with this > hardware block was exported in Linux as: > > input-xtal > xbyp > xc > mux > vbattclk > > where: > - input-xtal is the input clock (connected to RTXIN, RTXOUT pins) > - xc, xbyp are mux inputs > - mux is the internal mux > - vbattclk is the gate clock that feeds in the end the RTC > > to allow selecting the input of the MUX though assigned-clock DT > properties, using the already existing clock drivers and avoid adding > other DT properties. > > This allows select the input of the mux based on the type of the > connected input clock: > - if the 32768 crystal oscillator is connected as input for the VBATTB, > the input of the mux should be xc > - if an external clock device is connected as input for the VBATTB the > input of the mux should be xbyp > > Add clock IDs for the VBATTB controller. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > > Changes in v3: > - none; this patch is new > > include/dt-bindings/clock/r9a08g045-vbattb.h | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > create mode 100644 include/dt-bindings/clock/r9a08g045-vbattb.h Squash this into the previous patch. It is part of the binding. Rob
Hi Claudiu, Thanks for your patch! On Fri, Aug 30, 2024 at 3:02 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > The VBATTB controllers controls the clock for the RTC on the Renesas controller > RZ/G3S. The HW block diagram for the clock logic is as follows: > > +----------+ XC `\ > RTXIN --->| |----->| \ +----+ VBATTCLK > | 32K clock| | |----->|gate|-----------> > | osc | XBYP | | +----+ > RTXOUT --->| |----->| / > +----------+ ,/ > > One could connect as input to this HW block either a crystal oscillator or Please drop "oscillator". An external crystal is used with the internal crystal oscillator. > an external clock device. > > After discussions w/ Stephen Boyd the clock tree associated with this > hardware block was exported in Linux as: > > input-xtal > xbyp > xc > mux > vbattclk > > where: > - input-xtal is the input clock (connected to RTXIN, RTXOUT pins) > - xc, xbyp are mux inputs > - mux is the internal mux > - vbattclk is the gate clock that feeds in the end the RTC > > to allow selecting the input of the MUX though assigned-clock DT > properties, using the already existing clock drivers and avoid adding > other DT properties. > > This allows select the input of the mux based on the type of the > connected input clock: > - if the 32768 crystal oscillator is connected as input for the VBATTB, Please drop "oscillator". > the input of the mux should be xc > - if an external clock device is connected as input for the VBATTB the > input of the mux should be xbyp > > Add clock IDs for the VBATTB controller. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > > Changes in v3: > - none; this patch is new > --- /dev/null > +++ b/include/dt-bindings/clock/r9a08g045-vbattb.h renesas,r9a08g045-vbattb.h Gr{oetje,eeting}s, Geert
diff --git a/include/dt-bindings/clock/r9a08g045-vbattb.h b/include/dt-bindings/clock/r9a08g045-vbattb.h new file mode 100644 index 000000000000..67774eafad06 --- /dev/null +++ b/include/dt-bindings/clock/r9a08g045-vbattb.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * Copyright (C) 2024 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ +#define __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ + +#define VBATTB_XC 0 +#define VBATTB_XBYP 1 +#define VBATTB_MUX 2 +#define VBATTB_VBATTCLK 3 + +#endif /* __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ */