Message ID | 20240830061607.1940-2-zhiwei_liu@linux.alibaba.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | tcg/riscv: Add support for vector | expand |
On 8/30/24 16:15, LIU Zhiwei wrote: > From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> > > The loop in the 32-bit case of the vector compare operation > was incorrectly incrementing by 8 bytes per iteration instead > of 4 bytes. This caused the function to process only half of > the intended elements. > > Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> > Fixes: 9622c697d1 (tcg: Add gvec compare with immediate and scalar operand) > Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com> > --- > tcg/tcg-op-gvec.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~ > > diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c > index 0308732d9b..78ee1ced80 100644 > --- a/tcg/tcg-op-gvec.c > +++ b/tcg/tcg-op-gvec.c > @@ -3939,7 +3939,7 @@ void tcg_gen_gvec_cmps(TCGCond cond, unsigned vece, uint32_t dofs, > uint32_t i; > > tcg_gen_extrl_i64_i32(t1, c); > - for (i = 0; i < oprsz; i += 8) { > + for (i = 0; i < oprsz; i += 4) { > tcg_gen_ld_i32(t0, tcg_env, aofs + i); > tcg_gen_negsetcond_i32(cond, t0, t0, t1); > tcg_gen_st_i32(t0, tcg_env, dofs + i);
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index 0308732d9b..78ee1ced80 100644 --- a/tcg/tcg-op-gvec.c +++ b/tcg/tcg-op-gvec.c @@ -3939,7 +3939,7 @@ void tcg_gen_gvec_cmps(TCGCond cond, unsigned vece, uint32_t dofs, uint32_t i; tcg_gen_extrl_i64_i32(t1, c); - for (i = 0; i < oprsz; i += 8) { + for (i = 0; i < oprsz; i += 4) { tcg_gen_ld_i32(t0, tcg_env, aofs + i); tcg_gen_negsetcond_i32(cond, t0, t0, t1); tcg_gen_st_i32(t0, tcg_env, dofs + i);