mbox series

[0/3] Allow to enable PREEMPT_RT.

Message ID 20240906111841.562402-1-bigeasy@linutronix.de (mailing list archive)
Headers show
Series Allow to enable PREEMPT_RT. | expand

Message

Sebastian Andrzej Siewior Sept. 6, 2024, 10:59 a.m. UTC
The printk bits required for PREEMPT_RT are sitting in linux-next. This
was the last known roadblock for PREEMPT_RT. The RT queue has
additionally the "atomic console" for the 8250 UART which is not yet in
linux-next. This means "legacy console" behaviour as in no printing from
atomic context in emergency cases. The 8250 UART driver is the only one
providing "atomic console" support as of today.

With the printk bits merged, PREEMPT_RT could be enabled on X86, ARM64
and Risc-V. These three architectures merged required changes over the
years leaving me in a position where I have no essential changes in the
queue that would affect them.
ARM and POWERPC have a few essential patches left and I lost track of
MIPS.

Sebastian

Comments

Mingcong Bai Sept. 10, 2024, 2:39 a.m. UTC | #1
Hi Sebastian,

在 2024/9/6 18:59, Sebastian Andrzej Siewior 写道:
> The printk bits required for PREEMPT_RT are sitting in linux-next. This
> was the last known roadblock for PREEMPT_RT. The RT queue has
> additionally the "atomic console" for the 8250 UART which is not yet in
> linux-next. This means "legacy console" behaviour as in no printing from
> atomic context in emergency cases. The 8250 UART driver is the only one
> providing "atomic console" support as of today.
>
> With the printk bits merged, PREEMPT_RT could be enabled on X86, ARM64
> and Risc-V. These three architectures merged required changes over the
> years leaving me in a position where I have no essential changes in the
> queue that would affect them.
> ARM and POWERPC have a few essential patches left and I lost track of
> MIPS.
Congratulations, it's been a long time coming!

I'm wondering, for the architectures not included in the enablement this 
time, do we have a readiness checklist/guide for maintainers to refer to?

Thanks in advance.
>
> Sebastian
>
>
Best Regards,
Mingcong Bai
Sebastian Andrzej Siewior Sept. 12, 2024, 7:14 a.m. UTC | #2
On 2024-09-10 10:39:45 [+0800], Mingcong Bai wrote:
> Hi Sebastian,
Hi Mingcong,

> Congratulations, it's been a long time coming!
thank you.

> I'm wondering, for the architectures not included in the enablement this
> time, do we have a readiness checklist/guide for maintainers to refer to?

I don't think there is. The plain PREEMPT should work. Then need to
follow the checklist for forced-threaded interrupts. Generic code such
as GENERIC_ENTRY makes things easier but at least
HAVE_POSIX_CPU_TIMERS_TASK_WORK is needed with kvm enabled if my memory
serves me right. Everything else is part of generic code.

> Thanks in advance.
> Best Regards,
> Mingcong Bai

Sebastian