| Message ID | 20240915080733.3565-2-towinchenmi@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Initial device trees for A7-A11 based Apple devices | expand |
On Sun, Sep 15, 2024 at 03:58:46PM +0800, Nick Chan wrote: > Add the following CPU cores: > > - apple,cyclone: A7 cores > - apple,typhoon: A8 cores > - apple,twister: A9 cores > - apple,hurricane-zephyr: A10 logical cores > - apple,monsoon: A11 performance cores > - apple,mistral: A11 efficiency cores > > In the Apple A10, there are physical performance-efficiency cores that > forms logical cores to software depending on the current p-state, and > only one type of core may be active at one time. > > This follows the existing newest-first order. > > Signed-off-by: Nick Chan <towinchenmi@gmail.com> > --- > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index f308ff6c3532..3959e022079f 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -89,6 +89,12 @@ properties: > - apple,blizzard > - apple,icestorm > - apple,firestorm > + - apple,mistral > + - apple,monsoon > + - apple,hurricane-zephyr > + - apple,twister > + - apple,typhoon > + - apple,cyclone Please keep alphabetical order. And no, just because earlier Hector added stuff in reversed order, is not a reason to keep doing the same. Best regards, Krzysztof
On 16/9/2024 22:34, Krzysztof Kozlowski wrote: > On Sun, Sep 15, 2024 at 03:58:46PM +0800, Nick Chan wrote: >> Add the following CPU cores: >> >> - apple,cyclone: A7 cores >> - apple,typhoon: A8 cores >> - apple,twister: A9 cores >> - apple,hurricane-zephyr: A10 logical cores >> - apple,monsoon: A11 performance cores >> - apple,mistral: A11 efficiency cores >> >> In the Apple A10, there are physical performance-efficiency cores that >> forms logical cores to software depending on the current p-state, and >> only one type of core may be active at one time. >> >> This follows the existing newest-first order. >> >> Signed-off-by: Nick Chan <towinchenmi@gmail.com> >> --- >> Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml >> index f308ff6c3532..3959e022079f 100644 >> --- a/Documentation/devicetree/bindings/arm/cpus.yaml >> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml >> @@ -89,6 +89,12 @@ properties: >> - apple,blizzard >> - apple,icestorm >> - apple,firestorm >> + - apple,mistral >> + - apple,monsoon >> + - apple,hurricane-zephyr >> + - apple,twister >> + - apple,typhoon >> + - apple,cyclone > > Please keep alphabetical order. And no, just because earlier Hector > added stuff in reversed order, is not a reason to keep doing the same. Ack. All bindings added in this series except Documentation/devicetree/bindings/arm/apple.yaml will be changed to alphabetical order in v2. > > Best regards, > Krzysztof > Nick Chan
On 16/09/2024 16:47, Nick Chan wrote: > > > On 16/9/2024 22:34, Krzysztof Kozlowski wrote: >> On Sun, Sep 15, 2024 at 03:58:46PM +0800, Nick Chan wrote: >>> Add the following CPU cores: >>> >>> - apple,cyclone: A7 cores >>> - apple,typhoon: A8 cores >>> - apple,twister: A9 cores >>> - apple,hurricane-zephyr: A10 logical cores >>> - apple,monsoon: A11 performance cores >>> - apple,mistral: A11 efficiency cores >>> >>> In the Apple A10, there are physical performance-efficiency cores that >>> forms logical cores to software depending on the current p-state, and >>> only one type of core may be active at one time. >>> >>> This follows the existing newest-first order. >>> >>> Signed-off-by: Nick Chan <towinchenmi@gmail.com> >>> --- >>> Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml >>> index f308ff6c3532..3959e022079f 100644 >>> --- a/Documentation/devicetree/bindings/arm/cpus.yaml >>> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml >>> @@ -89,6 +89,12 @@ properties: >>> - apple,blizzard >>> - apple,icestorm >>> - apple,firestorm >>> + - apple,mistral >>> + - apple,monsoon >>> + - apple,hurricane-zephyr >>> + - apple,twister >>> + - apple,typhoon >>> + - apple,cyclone >> >> Please keep alphabetical order. And no, just because earlier Hector >> added stuff in reversed order, is not a reason to keep doing the same. > Ack. All bindings added in this series except > > Documentation/devicetree/bindings/arm/apple.yaml > > will be changed to alphabetical order in v2. Wait, that's not exactly what I meant. In Apple-specific bindings maybe some chronological order was chosen earlier. If there is some known order, you can keep it. But for common bindings (so like one here)we prefer alphabetical. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index f308ff6c3532..3959e022079f 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -89,6 +89,12 @@ properties: - apple,blizzard - apple,icestorm - apple,firestorm + - apple,mistral + - apple,monsoon + - apple,hurricane-zephyr + - apple,twister + - apple,typhoon + - apple,cyclone - arm,arm710t - arm,arm720t - arm,arm740t
Add the following CPU cores: - apple,cyclone: A7 cores - apple,typhoon: A8 cores - apple,twister: A9 cores - apple,hurricane-zephyr: A10 logical cores - apple,monsoon: A11 performance cores - apple,mistral: A11 efficiency cores In the Apple A10, there are physical performance-efficiency cores that forms logical cores to software depending on the current p-state, and only one type of core may be active at one time. This follows the existing newest-first order. Signed-off-by: Nick Chan <towinchenmi@gmail.com> --- Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ 1 file changed, 6 insertions(+)