Message ID | 20240926065422.226518-4-nick.hu@sifive.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | Support SSTC while PM operations | expand |
On Thu, Sep 26, 2024 at 12:26 PM Nick Hu <nick.hu@sifive.com> wrote: > > Stop the stimecmp when the cpu is going to be off otherwise the timer > stimecmp register while cpu non retention suspend. > > Suggested-by: Anup Patel <anup@brainfault.org> > Link: https://lore.kernel.org/lkml/20240829033904.477200-3-nick.hu@sifive.com/T/#u > Signed-off-by: Nick Hu <nick.hu@sifive.com> LGTM. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup > --- > drivers/clocksource/timer-riscv.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 48ce50c5f5e6..166dee14e46b 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -127,6 +127,12 @@ static int riscv_timer_starting_cpu(unsigned int cpu) > static int riscv_timer_dying_cpu(unsigned int cpu) > { > disable_percpu_irq(riscv_clock_event_irq); > + /* > + * Stop the timer when the cpu is going to be offline otherwise > + * the timer interrupt may be pending while performing power-down. > + */ > + riscv_clock_event_stop(); > + > return 0; > } > > -- > 2.34.1 >
On Thu, Sep 26, 2024 at 02:54:18PM GMT, Nick Hu wrote: > Stop the stimecmp when the cpu is going to be off otherwise the timer > stimecmp register while cpu non retention suspend. This commit message seems to be missing some words. The comment below reads much better. Thanks, drew > > Suggested-by: Anup Patel <anup@brainfault.org> > Link: https://lore.kernel.org/lkml/20240829033904.477200-3-nick.hu@sifive.com/T/#u > Signed-off-by: Nick Hu <nick.hu@sifive.com> > --- > drivers/clocksource/timer-riscv.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 48ce50c5f5e6..166dee14e46b 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -127,6 +127,12 @@ static int riscv_timer_starting_cpu(unsigned int cpu) > static int riscv_timer_dying_cpu(unsigned int cpu) > { > disable_percpu_irq(riscv_clock_event_irq); > + /* > + * Stop the timer when the cpu is going to be offline otherwise > + * the timer interrupt may be pending while performing power-down. > + */ > + riscv_clock_event_stop(); > + > return 0; > } > > -- > 2.34.1 >
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 48ce50c5f5e6..166dee14e46b 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -127,6 +127,12 @@ static int riscv_timer_starting_cpu(unsigned int cpu) static int riscv_timer_dying_cpu(unsigned int cpu) { disable_percpu_irq(riscv_clock_event_irq); + /* + * Stop the timer when the cpu is going to be offline otherwise + * the timer interrupt may be pending while performing power-down. + */ + riscv_clock_event_stop(); + return 0; }
Stop the stimecmp when the cpu is going to be off otherwise the timer stimecmp register while cpu non retention suspend. Suggested-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/lkml/20240829033904.477200-3-nick.hu@sifive.com/T/#u Signed-off-by: Nick Hu <nick.hu@sifive.com> --- drivers/clocksource/timer-riscv.c | 6 ++++++ 1 file changed, 6 insertions(+)