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Fri, 27 Sep 2024 12:05:38 +0000 From: Aleksandar Rakic <aleksandar.rakic@htecgroup.com> To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org> CC: Djordje Todorovic <Djordje.Todorovic@htecgroup.com>, "cfu@mips.com" <cfu@mips.com> Subject: [PATCH 4/8] Skip NaN mode check for soft-float Thread-Topic: [PATCH 4/8] Skip NaN mode check for soft-float Thread-Index: AQHbENVIIsOIt5dgO0CP138By581Jw== Date: Fri, 27 Sep 2024 12:05:38 +0000 Message-ID: <PA4PR09MB4864BC65090CB019679B6F9A846B2@PA4PR09MB4864.eurprd09.prod.outlook.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=htecgroup.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: PA4PR09MB4864:EE_|PR3PR09MB4426:EE_ x-ms-office365-filtering-correlation-id: ec4d8c66-016a-444c-9b7e-08dcdeecb391 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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[1/8] Add CP0 MemoryMapID register implementation
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On Fri, 27 Sept 2024 at 14:27, Aleksandar Rakic <aleksandar.rakic@htecgroup.com> wrote: > > Skip NaN mode check for soft-float. > > Cherry-picked 63492a56485f6b755fccf7ad623f7a189bfc79b6 > from https://github.com/MIPS/gnutools-qemu Please could you provide proper commit messages that justify why the change is being made? "We got it from this other fork" isn't sufficient -- somebody reading the main QEMU git history should be able to understand the rationale for a change by looking at the commit message. thanks -- PMM
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 462387a073..07c1ebe287 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -304,8 +304,10 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) if (env->insn_flags & ISA_NANOMIPS32) { return; } - if (((info->elf_flags & EF_MIPS_NAN2008) != 0) != - ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) { + if (info->fp_abi != MIPS_ABI_FP_SOFT + && ((info->elf_flags & EF_MIPS_NAN2008) != 0) != + ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) + { if ((env->active_fpu.fcr31_rw_bitmask & (1 << FCR31_NAN2008)) == 0) { fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n");