diff mbox series

[v8,2/3] drm/mediatek: ovl: Add blend_modes to driver data

Message ID 20240928161546.9285-3-jason-jh.lin@mediatek.com (mailing list archive)
State New
Headers show
Series Fix degradation problem of alpha blending series | expand

Commit Message

Jason-JH Lin (林睿祥) Sept. 28, 2024, 4:15 p.m. UTC 
OVL_CON_CLRFMT_MAN is a configuration for extending color format
settings of DISP_REG_OVL_CON(n).
It will change some of the original color format settings.

Take the settings of (3 << 12) for example.
- If OVL_CON_CLRFMT_MAN = 0 means OVL_CON_CLRFMT_RGBA8888.
- If OVL_CON_CLRFMT_MAN = 1 means OVL_CON_CLRFMT_PARGB8888.

Since previous SoCs did not support OVL_CON_CLRFMT_MAN, this means
that the SoC does not support the premultiplied color format.
It will break the original color format setting of MT8173.

Therefore, the blend_modes is added to the driver data and then
mtk_ovl_fmt_convert() will check the blend_modes to see if
premultiplied supported in current platform.
If it is not supported, use coverage mode to set it to the supported
color formats to solve the degradation problem.

Fixes: a3f7f7ef4bfe ("drm/mediatek: Support "Pre-multiplied" blending in OVL")
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 34 ++++++++++++++++++++++---
 1 file changed, 31 insertions(+), 3 deletions(-)

Comments

CK Hu (胡俊光) Oct. 1, 2024, 8:47 a.m. UTC | #1 
Hi, Jason:

On Sun, 2024-09-29 at 00:15 +0800, Jason-JH.Lin wrote:
> OVL_CON_CLRFMT_MAN is a configuration for extending color format
> settings of DISP_REG_OVL_CON(n).
> It will change some of the original color format settings.
> 
> Take the settings of (3 << 12) for example.
> - If OVL_CON_CLRFMT_MAN = 0 means OVL_CON_CLRFMT_RGBA8888.
> - If OVL_CON_CLRFMT_MAN = 1 means OVL_CON_CLRFMT_PARGB8888.
> 
> Since previous SoCs did not support OVL_CON_CLRFMT_MAN, this means
> that the SoC does not support the premultiplied color format.
> It will break the original color format setting of MT8173.
> 
> Therefore, the blend_modes is added to the driver data and then
> mtk_ovl_fmt_convert() will check the blend_modes to see if
> premultiplied supported in current platform.
> If it is not supported, use coverage mode to set it to the supported
> color formats to solve the degradation problem.

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> 
> Fixes: a3f7f7ef4bfe ("drm/mediatek: Support "Pre-multiplied" blending in OVL")
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 34 ++++++++++++++++++++++---
>  1 file changed, 31 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 4a4bc27a67f0..4bfed8a4c14f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -146,6 +146,7 @@ struct mtk_disp_ovl_data {
>  	bool fmt_rgb565_is_0;
>  	bool smi_id_en;
>  	bool supports_afbc;
> +	const u32 blend_modes;
>  	const u32 *formats;
>  	size_t num_formats;
>  	bool supports_clrfmt_ext;
> @@ -386,9 +387,27 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
>  		      DISP_REG_OVL_RDMA_CTRL(idx));
>  }
>  
> -static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt,
> -				    unsigned int blend_mode)
> +static unsigned int mtk_ovl_fmt_convert(struct mtk_disp_ovl *ovl,
> +					struct mtk_plane_state *state)
>  {
> +	unsigned int fmt = state->pending.format;
> +	unsigned int blend_mode = DRM_MODE_BLEND_COVERAGE;
> +
> +	/*
> +	 * For the platforms where OVL_CON_CLRFMT_MAN is defined in the hardware data sheet
> +	 * and supports premultiplied color formats, such as OVL_CON_CLRFMT_PARGB8888.
> +	 *
> +	 * Check blend_modes in the driver data to see if premultiplied mode is supported.
> +	 * If not, use coverage mode instead to set it to the supported color formats.
> +	 *
> +	 * Current DRM assumption is that alpha is default premultiplied, so the bitmask of
> +	 * blend_modes must include BIT(DRM_MODE_BLEND_PREMULTI). Otherwise, mtk_plane_init()
> +	 * will get an error return from drm_plane_create_blend_mode_property() and
> +	 * state->base.pixel_blend_mode should not be used.
> +	 */
> +	if (ovl->data->blend_modes & BIT(DRM_MODE_BLEND_PREMULTI))
> +		blend_mode = state->base.pixel_blend_mode;
> +
>  	switch (fmt) {
>  	default:
>  	case DRM_FORMAT_RGB565:
> @@ -466,7 +485,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
>  		return;
>  	}
>  
> -	con = ovl_fmt_convert(ovl, fmt, blend_mode);
> +	con = mtk_ovl_fmt_convert(ovl, state);
>  	if (state->base.fb) {
>  		con |= OVL_CON_AEN;
>  		con |= state->base.alpha & OVL_CON_ALPHA;
> @@ -658,6 +677,9 @@ static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = {
>  	.layer_nr = 4,
>  	.fmt_rgb565_is_0 = true,
>  	.smi_id_en = true,
> +	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
> +		       BIT(DRM_MODE_BLEND_COVERAGE) |
> +		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
>  	.formats = mt8173_formats,
>  	.num_formats = ARRAY_SIZE(mt8173_formats),
>  };
> @@ -668,6 +690,9 @@ static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = {
>  	.layer_nr = 2,
>  	.fmt_rgb565_is_0 = true,
>  	.smi_id_en = true,
> +	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
> +		       BIT(DRM_MODE_BLEND_COVERAGE) |
> +		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
>  	.formats = mt8173_formats,
>  	.num_formats = ARRAY_SIZE(mt8173_formats),
>  };
> @@ -679,6 +704,9 @@ static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
>  	.fmt_rgb565_is_0 = true,
>  	.smi_id_en = true,
>  	.supports_afbc = true,
> +	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
> +		       BIT(DRM_MODE_BLEND_COVERAGE) |
> +		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
>  	.formats = mt8195_formats,
>  	.num_formats = ARRAY_SIZE(mt8195_formats),
>  	.supports_clrfmt_ext = true,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 4a4bc27a67f0..4bfed8a4c14f 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -146,6 +146,7 @@  struct mtk_disp_ovl_data {
 	bool fmt_rgb565_is_0;
 	bool smi_id_en;
 	bool supports_afbc;
+	const u32 blend_modes;
 	const u32 *formats;
 	size_t num_formats;
 	bool supports_clrfmt_ext;
@@ -386,9 +387,27 @@  void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
 		      DISP_REG_OVL_RDMA_CTRL(idx));
 }
 
-static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt,
-				    unsigned int blend_mode)
+static unsigned int mtk_ovl_fmt_convert(struct mtk_disp_ovl *ovl,
+					struct mtk_plane_state *state)
 {
+	unsigned int fmt = state->pending.format;
+	unsigned int blend_mode = DRM_MODE_BLEND_COVERAGE;
+
+	/*
+	 * For the platforms where OVL_CON_CLRFMT_MAN is defined in the hardware data sheet
+	 * and supports premultiplied color formats, such as OVL_CON_CLRFMT_PARGB8888.
+	 *
+	 * Check blend_modes in the driver data to see if premultiplied mode is supported.
+	 * If not, use coverage mode instead to set it to the supported color formats.
+	 *
+	 * Current DRM assumption is that alpha is default premultiplied, so the bitmask of
+	 * blend_modes must include BIT(DRM_MODE_BLEND_PREMULTI). Otherwise, mtk_plane_init()
+	 * will get an error return from drm_plane_create_blend_mode_property() and
+	 * state->base.pixel_blend_mode should not be used.
+	 */
+	if (ovl->data->blend_modes & BIT(DRM_MODE_BLEND_PREMULTI))
+		blend_mode = state->base.pixel_blend_mode;
+
 	switch (fmt) {
 	default:
 	case DRM_FORMAT_RGB565:
@@ -466,7 +485,7 @@  void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
 		return;
 	}
 
-	con = ovl_fmt_convert(ovl, fmt, blend_mode);
+	con = mtk_ovl_fmt_convert(ovl, state);
 	if (state->base.fb) {
 		con |= OVL_CON_AEN;
 		con |= state->base.alpha & OVL_CON_ALPHA;
@@ -658,6 +677,9 @@  static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = {
 	.layer_nr = 4,
 	.fmt_rgb565_is_0 = true,
 	.smi_id_en = true,
+	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
+		       BIT(DRM_MODE_BLEND_COVERAGE) |
+		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
 	.formats = mt8173_formats,
 	.num_formats = ARRAY_SIZE(mt8173_formats),
 };
@@ -668,6 +690,9 @@  static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = {
 	.layer_nr = 2,
 	.fmt_rgb565_is_0 = true,
 	.smi_id_en = true,
+	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
+		       BIT(DRM_MODE_BLEND_COVERAGE) |
+		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
 	.formats = mt8173_formats,
 	.num_formats = ARRAY_SIZE(mt8173_formats),
 };
@@ -679,6 +704,9 @@  static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
 	.fmt_rgb565_is_0 = true,
 	.smi_id_en = true,
 	.supports_afbc = true,
+	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
+		       BIT(DRM_MODE_BLEND_COVERAGE) |
+		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
 	.formats = mt8195_formats,
 	.num_formats = ARRAY_SIZE(mt8195_formats),
 	.supports_clrfmt_ext = true,