[6.1.y-cip,08/30] media: dt-bindings: Document Renesas RZ/G2L CRU block

Message ID	20240805164342.211857-9-biju.das.jz@bp.renesas.com (mailing list archive)
State	New
Headers	show Return-Path: <biju.das.jz@bp.renesas.com> ip: 210.160.252.171, mailfrom: biju.das.jz@bp.renesas.com) From: Biju Das <biju.das.jz@bp.renesas.com> To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>, Pavel Machek <pavel@denx.de> Cc: Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH 6.1.y-cip 08/30] media: dt-bindings: Document Renesas RZ/G2L CRU block Date: Mon, 5 Aug 2024 17:43:01 +0100 Message-ID: <20240805164342.211857-9-biju.das.jz@bp.renesas.com> In-Reply-To: <20240805164342.211857-1-biju.das.jz@bp.renesas.com> References: <20240805164342.211857-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	Add support for RZ/{G2L,G2LC,G2UL,V2L} Camera Data Receiving Unit \| expand [6.1.y-cip,00/30] Add support for RZ/{G2L,G2LC,G2UL,V2L} Camera Data Receiving Unit [6.1.y-cip,01/30] media: i2c: ov5645: Drop fetching the clk reference by name [6.1.y-cip,02/30] media: i2c: ov5645: Use runtime PM [6.1.y-cip,03/30] media: i2c: ov5645: Drop empty comment [6.1.y-cip,04/30] media: i2c: ov5645: Make sure to call PM functions [6.1.y-cip,05/30] media: i2c: ov5645: Call ov5645_entity_init_cfg() before registering the subdev [6.1.y-cip,06/30] media: i2c: ov5645: Remove software reset entry from ov5645_global_init_setting [6.1.y-cip,07/30] media: dt-bindings: Document Renesas RZ/G2L CSI-2 block [6.1.y-cip,08/30] media: dt-bindings: Document Renesas RZ/G2L CRU block [6.1.y-cip,09/30] clk: renesas: r9a07g044: Add clock and reset entries for CRU [6.1.y-cip,10/30] clk: renesas: r9a07g043: Add clock and reset entries for CRU [6.1.y-cip,11/30] media: platform: Add Renesas RZ/G2L MIPI CSI-2 receiver driver [6.1.y-cip,12/30] media: platform: Add Renesas RZ/G2L CRU driver [6.1.y-cip,13/30] media: rzg2l-cru: Remove unnecessary shadowing of ret in rzg2l_csi2_s_stream() [6.1.y-cip,14/30] media: platform: renesas: rzg2l-cru: Add missing documentation for image_conv_irq [6.1.y-cip,15/30] media: rzg2l-cru: Fix missing error code in rzg2l_cru_start_streaming_vq() [6.1.y-cip,16/30] media: rzg2l-cru: fix a test for timeout [6.1.y-cip,17/30] media: platform: rzg2l-cru: rzg2l-csi2: Switch to RUNTIME_PM_OPS() [6.1.y-cip,18/30] media: platform: rzg2l-cru: rzg2l-ip: Add delay after D-PHY reset [6.1.y-cip,19/30] media: platform: rzg2l-cru: rzg2l-video: Fix image processing initialization [6.1.y-cip,20/30] media: platform: rzg2l-cru: rzg2l-csi2: Restructure vclk handling [6.1.y-cip,21/30] media: platform: rzg2l-cru: rzg2l-video: Fix start reception procedure [6.1.y-cip,22/30] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G2UL CSI-2 block [6.1.y-cip,23/30] media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G2UL CRU block [6.1.y-cip,24/30] arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes [6.1.y-cip,25/30] arm64: dts: renesas: r9a07g054: Add CSI and CRU nodes [6.1.y-cip,26/30] arm64: dts: renesas: r9a07g043u: Add CSI and CRU nodes [6.1.y-cip,27/30] arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support [6.1.y-cip,28/30] arm64: dts: renesas: rzg2lc-smarc: Enable CRU, CSI support [6.1.y-cip,29/30] arm64: dts: renesas: rzg2ul-smarc: Enable CRU, CSI support [6.1.y-cip,30/30] arm64: defconfig: Enable RZ/G2L MIPI CSI-2 and CRU support

diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml new file mode 100644 index 000000000000..7dde7967c886 --- /dev/null +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml @@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2022 Renesas Electronics Corp. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G2L (and alike SoC's) Camera Data Receiving Unit (CRU) Image processing + +maintainers: + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> + +description: + The CRU image processing module is a data conversion module equipped with pixel + color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and + parallel (including ITU-R BT.656) input are provided as the image sensor interface. + +properties: + compatible: + items: + - enum: + - renesas,r9a07g044-cru # RZ/G2{L,LC} + - renesas,r9a07g054-cru # RZ/V2L + - const: renesas,rzg2l-cru + + reg: + maxItems: 1 + + interrupts: + maxItems: 3 + + interrupt-names: + items: + - const: image_conv + - const: image_conv_err + - const: axi_mst_err + + clocks: + items: + - description: CRU Main clock + - description: CRU Register access clock + - description: CRU image transfer clock + + clock-names: + items: + - const: video + - const: apb + - const: axi + + power-domains: + maxItems: 1 + + resets: + items: + - description: CRU_PRESETN reset terminal + - description: CRU_ARESETN reset terminal + + reset-names: + items: + - const: presetn + - const: aresetn + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port node, single endpoint describing a parallel input source. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + hsync-active: true + vsync-active: true + bus-width: true + data-shift: true + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Input port node, describing the Image Processing module connected to the + CSI-2 receiver. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - power-domains + +additionalProperties: false + +examples: + # Device node example with CSI-2 + - | + #include <dt-bindings/clock/r9a07g044-cpg.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + cru: video@10830000 { + compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru"; + reg = <0x10830000 0x400>; + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "image_conv", "image_conv_err", "axi_mst_err"; + clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>, + <&cpg CPG_MOD R9A07G044_CRU_PCLK>, + <&cpg CPG_MOD R9A07G044_CRU_ACLK>; + clock-names = "video", "apb", "axi"; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_CRU_PRESETN>, + <&cpg R9A07G044_CRU_ARESETN>; + reset-names = "presetn", "aresetn"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + cru_parallel_in: endpoint@0 { + reg = <0>; + remote-endpoint= <&ov5642>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + cru_csi_in: endpoint@0 { + reg = <0>; + remote-endpoint= <&csi_cru_in>; + }; + }; + }; + };

[6.1.y-cip,08/30] media: dt-bindings: Document Renesas RZ/G2L CRU block

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