| Message ID | 20240927042509.4081753-4-animesh.manna@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Vrr refactoring and panel replay workaround | expand |
On Fri, 27 Sep 2024, Animesh Manna <animesh.manna@intel.com> wrote: > @@ -246,7 +251,8 @@ void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state) > struct intel_display *display = to_intel_display(crtc_state); > struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; > > - if (!crtc_state->vrr.flipline) > + //if (!crtc_state->vrr.flipline) > + if (!intel_vrr_possible(crtc_state)) > return; > > if (DISPLAY_VER(display) >= 13) { > @@ -286,7 +292,8 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) > intel_de_rmw(display, CHICKEN_TRANS(cpu_transcoder), > 0, PIPE_VBLANK_WITH_DELAY); > > - if (!crtc_state->vrr.flipline) { > + //if (!crtc_state->vrr.flipline) { > + if (!intel_vrr_possible(crtc_state)) { > intel_de_write(display, > TRANS_VRR_CTL(display, cpu_transcoder), 0); > return; What's the point of even sending this? What am I supposed to do with this? The series is at v12. We should aim at converging to merge at maybe v3 or v5 or so, at the latest. There are legitimate cases where v1 or v2 are RFC-like, figuring out the direction etc., but the goal for every single version after that should be that it's the last. BR, Jani.
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index bab8b2141b14..a8f846b654e9 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4000,7 +4000,7 @@ void intel_crtc_adjust_vblank_delay(struct intel_crtc_state *crtc_state) * crtc_vdisplay from crtc_vblank_start, so incrementing crtc_vblank_start * by 1 if both are equal. */ - if (!crtc_state->vrr.flipline && crtc_state->has_psr && + if (intel_vrr_possible(crtc_state) && crtc_state->has_psr && adjusted_mode->crtc_vblank_start == adjusted_mode->crtc_vdisplay && IS_DISPLAY_VER(display, 13, 14)) adjusted_mode->crtc_vblank_start += 1; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 6c4af3d79761..a1175e846c80 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -71,6 +71,11 @@ intel_vrr_check_modeset(struct intel_atomic_state *state) } } +bool intel_vrr_possible(const struct intel_crtc_state *crtc_state) +{ + return crtc_state->vrr.flipline; +} + /* * Without VRR registers get latched at: * vblank_start @@ -246,7 +251,8 @@ void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - if (!crtc_state->vrr.flipline) + //if (!crtc_state->vrr.flipline) + if (!intel_vrr_possible(crtc_state)) return; if (DISPLAY_VER(display) >= 13) { @@ -286,7 +292,8 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) intel_de_rmw(display, CHICKEN_TRANS(cpu_transcoder), 0, PIPE_VBLANK_WITH_DELAY); - if (!crtc_state->vrr.flipline) { + //if (!crtc_state->vrr.flipline) { + if (!intel_vrr_possible(crtc_state)) { intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), 0); return; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 3127c94e9778..4371775ea7ec 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -16,6 +16,7 @@ struct intel_crtc_state; bool intel_vrr_is_capable(struct intel_connector *connector); bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh); void intel_vrr_check_modeset(struct intel_atomic_state *state); +bool intel_vrr_possible(const struct intel_crtc_state *crtc_state); void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state); void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
Add a separate function to check if vrr possible or not using vrr.flipline variable. Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_vrr.c | 11 +++++++++-- drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 3 files changed, 11 insertions(+), 3 deletions(-)