| Message ID | 20241001152404.15830-1-ansuelsmth@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | fa56cf6be226977120fbc8863072fb0e0fcb8b0a |
| Headers | show |
| Series | mips: bmips: bcm6358/6368: define required brcm,bmips-cbr-reg | expand |
On 10/1/24 08:23, Christian Marangi wrote: > For the bcm6358/6368 SoC the brcm,bmips-cbr-reg due to bootloader > misconfiguration or HW bug from running the system from TP1. > > A workaround is now present to handle broken system that suffer from > this bug hence add the now required property. > > Reported-by: kernel test robot <lkp@intel.com> > Closes: https://lore.kernel.org/oe-kbuild-all/202409251520.pE12GzHd-lkp@intel.com/ > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> -- Florian
On Tue, Oct 01, 2024 at 05:23:59PM +0200, Christian Marangi wrote: > For the bcm6358/6368 SoC the brcm,bmips-cbr-reg due to bootloader > misconfiguration or HW bug from running the system from TP1. > > A workaround is now present to handle broken system that suffer from > this bug hence add the now required property. > > Reported-by: kernel test robot <lkp@intel.com> > Closes: https://lore.kernel.org/oe-kbuild-all/202409251520.pE12GzHd-lkp@intel.com/ > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > --- > arch/mips/boot/dts/brcm/bcm6358.dtsi | 1 + > arch/mips/boot/dts/brcm/bcm6368.dtsi | 1 + > 2 files changed, 2 insertions(+) applied to mips-next. Thomas.
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi index 777c4379ed03..5e487f66c343 100644 --- a/arch/mips/boot/dts/brcm/bcm6358.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi @@ -13,6 +13,7 @@ cpus { #size-cells = <0>; mips-hpt-frequency = <150000000>; + brcm,bmips-cbr-reg = <0xff400000>; cpu@0 { compatible = "brcm,bmips4350"; diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi index fc15e200877d..087f3295a14b 100644 --- a/arch/mips/boot/dts/brcm/bcm6368.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi @@ -13,6 +13,7 @@ cpus { #size-cells = <0>; mips-hpt-frequency = <200000000>; + brcm,bmips-cbr-reg = <0xff400000>; cpu@0 { compatible = "brcm,bmips4350";
For the bcm6358/6368 SoC the brcm,bmips-cbr-reg due to bootloader misconfiguration or HW bug from running the system from TP1. A workaround is now present to handle broken system that suffer from this bug hence add the now required property. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202409251520.pE12GzHd-lkp@intel.com/ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> --- arch/mips/boot/dts/brcm/bcm6358.dtsi | 1 + arch/mips/boot/dts/brcm/bcm6368.dtsi | 1 + 2 files changed, 2 insertions(+)