diff mbox series

[v5,4/5] pinctrl: qcom: ipq5018: allow it to be bulid on arm32

Message ID 20241002232804.3867-5-exxxxkc@getgoogleoff.me (mailing list archive)
State Not Applicable
Headers show
Series arm: dts: qcom-ipq5018-linksys-jamaica: Include dts from arm64 | expand

Commit Message

Karl Chan Oct. 2, 2024, 11:28 p.m. UTC
There are some ipq5018 based device's firmware only can able to boot
arm32 but the pinctrl driver dont allow it to be compiled on
arm32.Therefore this patch needed for those devices.

Signed-off-by: Karl Chan <exxxxkc@getgoogleoff.me>
---
 drivers/pinctrl/qcom/Kconfig.msm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Linus Walleij Oct. 4, 2024, 11:44 a.m. UTC | #1
On Thu, Oct 3, 2024 at 1:29 AM Karl Chan <exxxxkc@getgoogleoff.me> wrote:

> There are some ipq5018 based device's firmware only can able to boot
> arm32 but the pinctrl driver dont allow it to be compiled on
> arm32.Therefore this patch needed for those devices.
>
> Signed-off-by: Karl Chan <exxxxkc@getgoogleoff.me>
(...)
> -       depends on ARM64 || COMPILE_TEST
> +       depends on ARM || ARM64 || COMPILE_TEST

Can we get some more context for this?

Is this another one of those cases where the SoC is actually a
64bit core but vendors just choose to run it in 32bit mode because
that is what they want or what is the reason here? AFAIK
IPQ5018 is always Cortex-A53?

I just want to know if this is something we should encourage
or leave out-of-tree.

Yours,
Linus Walleij
Karl Chan Oct. 4, 2024, 7:25 p.m. UTC | #2
On 10/4/24 7:44 PM, Linus Walleij wrote:
> On Thu, Oct 3, 2024 at 1:29 AM Karl Chan <exxxxkc@getgoogleoff.me> wrote:
>
>> There are some ipq5018 based device's firmware only can able to boot
>> arm32 but the pinctrl driver dont allow it to be compiled on
>> arm32.Therefore this patch needed for those devices.
>>
>> Signed-off-by: Karl Chan <exxxxkc@getgoogleoff.me>
> (...)
>> -       depends on ARM64 || COMPILE_TEST
>> +       depends on ARM || ARM64 || COMPILE_TEST
> Can we get some more context for this?
>
> Is this another one of those cases where the SoC is actually a
> 64bit core but vendors just choose to run it in 32bit mode because
> that is what they want or what is the reason here? AFAIK
> IPQ5018 is always Cortex-A53?
>
> I just want to know if this is something we should encourage
> or leave out-of-tree.
>
> Yours,
> Linus Walleij


Yeah it is like those MSM8916 based device that only has 32bit 
firmware.(e.g. samsung e5).
AFIK , other ipq5018 based linksys router has 64bit firmware but this 
one dont.
Also this router seem to be identical to linksys ER5500 but with 32bit 
firmware and isp exclusive.
(It is PCCW isp exclusive router (See 
https://support.linksys.com/kb/article/3723-en/) )
Karl Chan Oct. 7, 2024, 3:32 p.m. UTC | #3
CBT U-Boot ver: 3.2.08  ([IPQ5018].[SPF11.3].[CSU2])


DRAM:  smem ram ptable found: ver: 1 len: 4

512 MiB

NAND:  QPIC controller support serial NAND

ID = 22c822c8

Vendor = c8

Device = 22

Serial Nand Device Found With ID : 0xc8 0x22

Serial NAND device Manufacturer:GD5F2GQ5REYIH

Device Size:256 MiB, Page size:2048, Spare Size:64, ECC:4-bit

SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000

ipq_spi: SPI Flash not found (bus/cs/speed/mode) = (0/0/48000000/0)

256 MiB

MMC:   sdhci: Node Not found, skipping initialization


PCI Link Intialized

PCI1 is not defined in the device tree

In:    serial@78AF000

Out:   serial@78AF000

Err:   serial@78AF000

machid: 8040001

eth0 MAC Address from ART is not valid

eth1 MAC Address from ART is not valid


Updating boot_count ... done


Saving Environment to NAND...

Erasing NAND...


Erasing at 0x5c0000 --  25% complete.
Erasing at 0x5e0000 --  50% complete.
Erasing at 0x600000 --  75% complete.
Erasing at 0x620000 -- 100% complete.

Writing to NAND... OK

Hit any key to stop autoboot:  3  2  1  0 

starting USB...

USB0:   Register 2000140 NbrPorts 2

Starting the controller

USB XHCI 1.10

scanning bus 0 for devices... 2 USB Device(s) found

reading boot-image.itb

16048071 bytes read in 8855 ms (1.7 MiB/s)

## Loading kernel from FIT Image at 44000000 ...

   Using 'standard' configuration

   Trying 'kernel' kernel subimage

     Description:  Kernel

     Type:         Kernel Image

     Compression:  uncompressed

     Data Start:   0x440000a8

     Data Size:    8249289 Bytes = 7.9 MiB

     Architecture: AArch64

     OS:           Linux

     Load Address: 0x41208000

     Entry Point:  0x41208000

   Verifying Hash Integrity ... OK

## Loading ramdisk from FIT Image at 44000000 ...

   Using 'standard' configuration

   Trying 'initrd' ramdisk subimage

     Description:  Initramfs image

     Type:         RAMDisk Image

     Compression:  Unknown Compression

     Data Start:   0x447ec43c

     Data Size:    7738968 Bytes = 7.4 MiB

     Architecture: AArch64

     OS:           Linux

     Load Address: unavailable

     Entry Point:  unavailable

   Verifying Hash Integrity ... OK

## Loading fdt from FIT Image at 44000000 ...

   Using 'standard' configuration

   Trying 'fdt' fdt subimage

     Description:  DTB

     Type:         Flat Device Tree

     Compression:  uncompressed

     Data Start:   0x447de10c

     Data Size:    58042 Bytes = 56.7 KiB

     Architecture: AArch64

   Verifying Hash Integrity ... OK

   Booting using the fdt blob at 0x447de10c

   Loading Kernel Image ... OK

   Loading Ramdisk to 4a0c0000, end 4a821658 ... OK

   Loading Device Tree to 4a0ae000, end 4a0bf2b9 ... OK

fdt_fixup_qpic: QPIC: unable to find node '/soc/qpic-nand@79b0000'

Could not find PCI in device tree

Using machid 0x8040001 from environment


Starting kernel ...


undefined instruction

pc : [<41208004>]	   lr : [<4a921f8f>]

reloc pc : [<41208004>]	   lr : [<4a921f8f>]

sp : 4a822838  ip : 00000001	 fp : 00000000

r10: 4a83b914  r9 : 4a822ea0	 r8 : 00000000

r7 : 00000000  r6 : 41208000	 r5 : 4a97d848  r4 : 00000000

r3 : 644d5241  r2 : 4a0ae000	 r1 : 08040001  r0 : 00000000

Flags: nzCV  IRQs off  FIQs off  Mode SVC_32

Resetting CPU ...


resetting ...
Karl Chan Oct. 7, 2024, 3:36 p.m. UTC | #4
Here is the boot log of the stock bootloader trying to boot arm64 kernel :
diff mbox series

Patch

diff --git a/drivers/pinctrl/qcom/Kconfig.msm b/drivers/pinctrl/qcom/Kconfig.msm
index 8fe459d082ed..65cec6c50994 100644
--- a/drivers/pinctrl/qcom/Kconfig.msm
+++ b/drivers/pinctrl/qcom/Kconfig.msm
@@ -24,7 +24,7 @@  config PINCTRL_IPQ4019
 
 config PINCTRL_IPQ5018
 	tristate "Qualcomm Technologies, Inc. IPQ5018 pin controller driver"
-	depends on ARM64 || COMPILE_TEST
+	depends on ARM || ARM64 || COMPILE_TEST
 	help
 	  This is the pinctrl, pinmux, pinconf and gpiolib driver for
 	  the Qualcomm Technologies Inc. TLMM block found on the