| Message ID | 20240924204222.246862-15-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Reconcile i915's and xe's display power mgt sequences | expand |
-----Original Message----- From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Rodrigo Vivi Sent: Tuesday, September 24, 2024 1:36 PM To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org Cc: Deak, Imre <imre.deak@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com> Subject: [PATCH 14/31] drm/i915/display: Move resume sequences to intel_display_driver > > The goal is to reconcile the Xe and i915 PM functions. > Continue by moving the display sequences related to system > resume from i915_drv towards intel_display_driver. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > .../drm/i915/display/intel_display_driver.c | 25 +++++++++++++++++++ > .../drm/i915/display/intel_display_driver.h | 2 ++ > drivers/gpu/drm/i915/i915_driver.c | 17 ++----------- > drivers/gpu/drm/xe/display/xe_fb_pin.c | 4 +++ > 4 files changed, 33 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c > index f509ed1503c1..2a171cb2613a 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_driver.c > +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c > @@ -53,6 +53,7 @@ > #include "intel_modeset_setup.h" > #include "intel_opregion.h" > #include "intel_overlay.h" > +#include "intel_pch_refclk.h" > #include "intel_plane_initial.h" > #include "intel_pmdemand.h" > #include "intel_pps.h" > @@ -711,6 +712,30 @@ void intel_display_driver_suspend_noggtt(struct intel_display *display, bool s2i > intel_dmc_suspend(display); > } > > +void intel_display_driver_resume_noirq(struct drm_i915_private *i915) > +{ > + struct intel_display *display = &i915->display; > + > + /* Must be called after GGTT is resumed. */ > + intel_dpt_resume(i915); > + > + intel_dmc_resume(display); > + > + intel_vga_redisable(display); > + > + intel_gmbus_reset(i915); > + > + intel_pps_unlock_regs_wa(display); > + > + intel_init_pch_refclk(i915); > +} > + > +void intel_display_driver_resume_nogem(struct intel_display *display) > +{ > + if (HAS_DISPLAY(display)) > + drm_mode_config_reset(display->drm); > +} > + > int > __intel_display_driver_resume(struct drm_i915_private *i915, > struct drm_atomic_state *state, > diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.h b/drivers/gpu/drm/i915/display/intel_display_driver.h > index 179fbb86923a..dec93f2f37c6 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_driver.h > +++ b/drivers/gpu/drm/i915/display/intel_display_driver.h > @@ -29,6 +29,8 @@ int intel_display_driver_suspend(struct drm_i915_private *i915); > void intel_display_driver_suspend_noirq(struct drm_i915_private *i915); > void intel_display_driver_suspend_noggtt(struct intel_display *display, bool s2idle); > void intel_display_driver_resume(struct drm_i915_private *i915); > +void intel_display_driver_resume_noirq(struct drm_i915_private *i915); > +void intel_display_driver_resume_nogem(struct intel_display *display); > void intel_display_driver_shutdown(struct drm_i915_private *i915); > void intel_display_driver_shutdown_noirq(struct drm_i915_private *i915); > void intel_display_driver_shutdown_nogem(struct drm_i915_private *i915); > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c > index 12639fa232b3..c9df361f898f 100644 > --- a/drivers/gpu/drm/i915/i915_driver.c > +++ b/drivers/gpu/drm/i915/i915_driver.c > @@ -56,7 +56,6 @@ > #include "display/intel_encoder.h" > #include "display/intel_hotplug.h" > #include "display/intel_overlay.h" > -#include "display/intel_pch_refclk.h" > #include "display/intel_pps.h" > #include "display/intel_sprite_uapi.h" > #include "display/intel_vga.h" > @@ -1115,20 +1114,9 @@ static int i915_drm_resume(struct drm_device *dev) > if (GRAPHICS_VER(gt->i915) >= 8) > setup_private_pat(gt); > > - /* Must be called after GGTT is resumed. */ > - intel_dpt_resume(dev_priv); > - > - intel_dmc_resume(display); > - > i9xx_display_sr_restore(dev_priv); > > - intel_vga_redisable(display); > - > - intel_gmbus_reset(dev_priv); > - > - intel_pps_unlock_regs_wa(display); > - > - intel_init_pch_refclk(dev_priv); > + intel_display_driver_resume_noirq(dev_priv); > > /* > * Interrupts have to be enabled before any batches are run. If not the > @@ -1142,8 +1130,7 @@ static int i915_drm_resume(struct drm_device *dev) > */ > intel_irq_resume(dev_priv); > > - if (HAS_DISPLAY(dev_priv)) > - drm_mode_config_reset(dev); > + intel_display_driver_resume_nogem(display); > > i915_gem_resume(dev_priv); > > diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c > index 49dc91bdbcb0..c26a47dac332 100644 > --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c > +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c > @@ -412,3 +412,7 @@ u64 intel_dpt_offset(struct i915_vma *dpt_vma) > void intel_dpt_suspend(struct xe_device *xe) > { > } > + > +void intel_dpt_resume(struct xe_device *xe) > +{ > +} See my note on patch 8. Otherwise: Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> -Jonathan Cavitt > -- > 2.46.0 > >
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c index f509ed1503c1..2a171cb2613a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_driver.c +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c @@ -53,6 +53,7 @@ #include "intel_modeset_setup.h" #include "intel_opregion.h" #include "intel_overlay.h" +#include "intel_pch_refclk.h" #include "intel_plane_initial.h" #include "intel_pmdemand.h" #include "intel_pps.h" @@ -711,6 +712,30 @@ void intel_display_driver_suspend_noggtt(struct intel_display *display, bool s2i intel_dmc_suspend(display); } +void intel_display_driver_resume_noirq(struct drm_i915_private *i915) +{ + struct intel_display *display = &i915->display; + + /* Must be called after GGTT is resumed. */ + intel_dpt_resume(i915); + + intel_dmc_resume(display); + + intel_vga_redisable(display); + + intel_gmbus_reset(i915); + + intel_pps_unlock_regs_wa(display); + + intel_init_pch_refclk(i915); +} + +void intel_display_driver_resume_nogem(struct intel_display *display) +{ + if (HAS_DISPLAY(display)) + drm_mode_config_reset(display->drm); +} + int __intel_display_driver_resume(struct drm_i915_private *i915, struct drm_atomic_state *state, diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.h b/drivers/gpu/drm/i915/display/intel_display_driver.h index 179fbb86923a..dec93f2f37c6 100644 --- a/drivers/gpu/drm/i915/display/intel_display_driver.h +++ b/drivers/gpu/drm/i915/display/intel_display_driver.h @@ -29,6 +29,8 @@ int intel_display_driver_suspend(struct drm_i915_private *i915); void intel_display_driver_suspend_noirq(struct drm_i915_private *i915); void intel_display_driver_suspend_noggtt(struct intel_display *display, bool s2idle); void intel_display_driver_resume(struct drm_i915_private *i915); +void intel_display_driver_resume_noirq(struct drm_i915_private *i915); +void intel_display_driver_resume_nogem(struct intel_display *display); void intel_display_driver_shutdown(struct drm_i915_private *i915); void intel_display_driver_shutdown_noirq(struct drm_i915_private *i915); void intel_display_driver_shutdown_nogem(struct drm_i915_private *i915); diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 12639fa232b3..c9df361f898f 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -56,7 +56,6 @@ #include "display/intel_encoder.h" #include "display/intel_hotplug.h" #include "display/intel_overlay.h" -#include "display/intel_pch_refclk.h" #include "display/intel_pps.h" #include "display/intel_sprite_uapi.h" #include "display/intel_vga.h" @@ -1115,20 +1114,9 @@ static int i915_drm_resume(struct drm_device *dev) if (GRAPHICS_VER(gt->i915) >= 8) setup_private_pat(gt); - /* Must be called after GGTT is resumed. */ - intel_dpt_resume(dev_priv); - - intel_dmc_resume(display); - i9xx_display_sr_restore(dev_priv); - intel_vga_redisable(display); - - intel_gmbus_reset(dev_priv); - - intel_pps_unlock_regs_wa(display); - - intel_init_pch_refclk(dev_priv); + intel_display_driver_resume_noirq(dev_priv); /* * Interrupts have to be enabled before any batches are run. If not the @@ -1142,8 +1130,7 @@ static int i915_drm_resume(struct drm_device *dev) */ intel_irq_resume(dev_priv); - if (HAS_DISPLAY(dev_priv)) - drm_mode_config_reset(dev); + intel_display_driver_resume_nogem(display); i915_gem_resume(dev_priv); diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c index 49dc91bdbcb0..c26a47dac332 100644 --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c @@ -412,3 +412,7 @@ u64 intel_dpt_offset(struct i915_vma *dpt_vma) void intel_dpt_suspend(struct xe_device *xe) { } + +void intel_dpt_resume(struct xe_device *xe) +{ +}
The goal is to reconcile the Xe and i915 PM functions. Continue by moving the display sequences related to system resume from i915_drv towards intel_display_driver. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- .../drm/i915/display/intel_display_driver.c | 25 +++++++++++++++++++ .../drm/i915/display/intel_display_driver.h | 2 ++ drivers/gpu/drm/i915/i915_driver.c | 17 ++----------- drivers/gpu/drm/xe/display/xe_fb_pin.c | 4 +++ 4 files changed, 33 insertions(+), 15 deletions(-)