Message ID | 20241004-arm64-elf-hwcap3-v2-2-799d1daad8b0@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: Add infrastructure for use of AT_HWCAP3 | expand |
On 10/5/24 01:56, Mark Brown wrote: > We have filled all 64 bits of AT_HWCAP2 so in order to support discovery of > further features provide the framework to use the already defined AT_HWCAP3 > for further CPU features. > > Signed-off-by: Mark Brown <broonie@kernel.org> > --- > Documentation/arch/arm64/elf_hwcaps.rst | 6 +++--- > arch/arm64/include/asm/cpufeature.h | 3 ++- > arch/arm64/include/asm/hwcap.h | 6 +++++- > arch/arm64/include/uapi/asm/hwcap.h | 4 ++++ > arch/arm64/kernel/cpufeature.c | 6 ++++++ > 5 files changed, 20 insertions(+), 5 deletions(-) > > diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst > index 694f67fa07d196816b1292e896ebe6a1b599c125..dc1b11d6d1122bba928b054cd1874aad5073e05c 100644 > --- a/Documentation/arch/arm64/elf_hwcaps.rst > +++ b/Documentation/arch/arm64/elf_hwcaps.rst > @@ -16,9 +16,9 @@ architected discovery mechanism available to userspace code at EL0. The > kernel exposes the presence of these features to userspace through a set > of flags called hwcaps, exposed in the auxiliary vector. > > -Userspace software can test for features by acquiring the AT_HWCAP or > -AT_HWCAP2 entry of the auxiliary vector, and testing whether the relevant > -flags are set, e.g.:: > +Userspace software can test for features by acquiring the AT_HWCAP, > +AT_HWCAP2 or AT_HWCAP3 entry of the auxiliary vector, and testing > +whether the relevant flags are set, e.g.:: > > bool floating_point_is_present(void) > { > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index 3d261cc123c1e22ac7bc9cfcde463624c76b2084..38e7d1a44ea38ab0a06a6f22824ae023b128721b 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -12,7 +12,7 @@ > #include <asm/hwcap.h> > #include <asm/sysreg.h> > > -#define MAX_CPU_FEATURES 128 > +#define MAX_CPU_FEATURES 192 > #define cpu_feature(x) KERNEL_HWCAP_ ## x > > #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR 0 > @@ -438,6 +438,7 @@ void cpu_set_feature(unsigned int num); > bool cpu_have_feature(unsigned int num); > unsigned long cpu_get_elf_hwcap(void); > unsigned long cpu_get_elf_hwcap2(void); > +unsigned long cpu_get_elf_hwcap3(void); > > #define cpu_set_named_feature(name) cpu_set_feature(cpu_feature(name)) > #define cpu_have_named_feature(name) cpu_have_feature(cpu_feature(name)) > diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h > index a775adddecf25633e87d58fb9ac9e6293beac1b3..3b5c50df419ee94193a4d9e3a47516eb0739e89a 100644 > --- a/arch/arm64/include/asm/hwcap.h > +++ b/arch/arm64/include/asm/hwcap.h > @@ -159,17 +159,21 @@ > #define KERNEL_HWCAP_SME_SF8DP2 __khwcap2_feature(SME_SF8DP2) > #define KERNEL_HWCAP_POE __khwcap2_feature(POE) > > +#define __khwcap3_feature(x) (const_ilog2(HWCAP3_ ## x) + 128) > + > /* > * This yields a mask that user programs can use to figure out what > * instruction set this cpu supports. > */ > #define ELF_HWCAP cpu_get_elf_hwcap() > #define ELF_HWCAP2 cpu_get_elf_hwcap2() > +#define ELF_HWCAP3 cpu_get_elf_hwcap3() > > #ifdef CONFIG_COMPAT > #define COMPAT_ELF_HWCAP (compat_elf_hwcap) > #define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2) > -extern unsigned int compat_elf_hwcap, compat_elf_hwcap2; > +#define COMPAT_ELF_HWCAP3 (compat_elf_hwcap3) > +extern unsigned int compat_elf_hwcap, compat_elf_hwcap2, compat_elf_hwcap3; > #endif > > enum { > diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h > index 055381b2c61595361c2d57d38be936c2dfeaa195..3dd4a53a438a14bfb41882b2ab15bdd7ce617475 100644 > --- a/arch/arm64/include/uapi/asm/hwcap.h > +++ b/arch/arm64/include/uapi/asm/hwcap.h > @@ -124,4 +124,8 @@ > #define HWCAP2_SME_SF8DP2 (1UL << 62) > #define HWCAP2_POE (1UL << 63) > > +/* > + * HWCAP3 flags - for AT_HWCAP3 > + */ > + > #endif /* _UAPI__ASM_HWCAP_H */ > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 718728a85430fad5151b73fa213a510efac3f834..7221636b790709b153b49126e00246cc3032a7bc 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -103,6 +103,7 @@ static DECLARE_BITMAP(elf_hwcap, MAX_CPU_FEATURES) __read_mostly; > COMPAT_HWCAP_LPAE) > unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT; > unsigned int compat_elf_hwcap2 __read_mostly; > +unsigned int compat_elf_hwcap3 __read_mostly; > #endif > > DECLARE_BITMAP(system_cpucaps, ARM64_NCAPS); > @@ -3499,6 +3500,11 @@ unsigned long cpu_get_elf_hwcap2(void) > return elf_hwcap[1]; > } > > +unsigned long cpu_get_elf_hwcap3(void) > +{ > + return elf_hwcap[2]; > +} > + > static void __init setup_boot_cpu_capabilities(void) > { > /* > LGTM, but just curious do you have a upcoming feature to be added in AT_HWCAP3 soon ? Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
On Tue, Oct 08, 2024 at 12:45:42PM +0530, Anshuman Khandual wrote: > On 10/5/24 01:56, Mark Brown wrote: > > +unsigned long cpu_get_elf_hwcap3(void) > > +{ > > + return elf_hwcap[2]; > > +} > > + > > static void __init setup_boot_cpu_capabilities(void) > > { > > /* > LGTM, but just curious do you have a upcoming feature to be added > in AT_HWCAP3 soon ? We've filled AT_HWCAP2 already and are starting on the free bits in AT_HWCAP, there's only 29 of those remaining and we get things like the dpISA releases often burning through 15 at a time. Like the cover says it's not a pressing issue at this minute but whenever it does become a pressing issue there's likely to be multiple extensions in flight and it'll help not to have them all trying to carry the same serieses.
diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst index 694f67fa07d196816b1292e896ebe6a1b599c125..dc1b11d6d1122bba928b054cd1874aad5073e05c 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -16,9 +16,9 @@ architected discovery mechanism available to userspace code at EL0. The kernel exposes the presence of these features to userspace through a set of flags called hwcaps, exposed in the auxiliary vector. -Userspace software can test for features by acquiring the AT_HWCAP or -AT_HWCAP2 entry of the auxiliary vector, and testing whether the relevant -flags are set, e.g.:: +Userspace software can test for features by acquiring the AT_HWCAP, +AT_HWCAP2 or AT_HWCAP3 entry of the auxiliary vector, and testing +whether the relevant flags are set, e.g.:: bool floating_point_is_present(void) { diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 3d261cc123c1e22ac7bc9cfcde463624c76b2084..38e7d1a44ea38ab0a06a6f22824ae023b128721b 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -12,7 +12,7 @@ #include <asm/hwcap.h> #include <asm/sysreg.h> -#define MAX_CPU_FEATURES 128 +#define MAX_CPU_FEATURES 192 #define cpu_feature(x) KERNEL_HWCAP_ ## x #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR 0 @@ -438,6 +438,7 @@ void cpu_set_feature(unsigned int num); bool cpu_have_feature(unsigned int num); unsigned long cpu_get_elf_hwcap(void); unsigned long cpu_get_elf_hwcap2(void); +unsigned long cpu_get_elf_hwcap3(void); #define cpu_set_named_feature(name) cpu_set_feature(cpu_feature(name)) #define cpu_have_named_feature(name) cpu_have_feature(cpu_feature(name)) diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index a775adddecf25633e87d58fb9ac9e6293beac1b3..3b5c50df419ee94193a4d9e3a47516eb0739e89a 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -159,17 +159,21 @@ #define KERNEL_HWCAP_SME_SF8DP2 __khwcap2_feature(SME_SF8DP2) #define KERNEL_HWCAP_POE __khwcap2_feature(POE) +#define __khwcap3_feature(x) (const_ilog2(HWCAP3_ ## x) + 128) + /* * This yields a mask that user programs can use to figure out what * instruction set this cpu supports. */ #define ELF_HWCAP cpu_get_elf_hwcap() #define ELF_HWCAP2 cpu_get_elf_hwcap2() +#define ELF_HWCAP3 cpu_get_elf_hwcap3() #ifdef CONFIG_COMPAT #define COMPAT_ELF_HWCAP (compat_elf_hwcap) #define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2) -extern unsigned int compat_elf_hwcap, compat_elf_hwcap2; +#define COMPAT_ELF_HWCAP3 (compat_elf_hwcap3) +extern unsigned int compat_elf_hwcap, compat_elf_hwcap2, compat_elf_hwcap3; #endif enum { diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h index 055381b2c61595361c2d57d38be936c2dfeaa195..3dd4a53a438a14bfb41882b2ab15bdd7ce617475 100644 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -124,4 +124,8 @@ #define HWCAP2_SME_SF8DP2 (1UL << 62) #define HWCAP2_POE (1UL << 63) +/* + * HWCAP3 flags - for AT_HWCAP3 + */ + #endif /* _UAPI__ASM_HWCAP_H */ diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 718728a85430fad5151b73fa213a510efac3f834..7221636b790709b153b49126e00246cc3032a7bc 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -103,6 +103,7 @@ static DECLARE_BITMAP(elf_hwcap, MAX_CPU_FEATURES) __read_mostly; COMPAT_HWCAP_LPAE) unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT; unsigned int compat_elf_hwcap2 __read_mostly; +unsigned int compat_elf_hwcap3 __read_mostly; #endif DECLARE_BITMAP(system_cpucaps, ARM64_NCAPS); @@ -3499,6 +3500,11 @@ unsigned long cpu_get_elf_hwcap2(void) return elf_hwcap[1]; } +unsigned long cpu_get_elf_hwcap3(void) +{ + return elf_hwcap[2]; +} + static void __init setup_boot_cpu_capabilities(void) { /*
We have filled all 64 bits of AT_HWCAP2 so in order to support discovery of further features provide the framework to use the already defined AT_HWCAP3 for further CPU features. Signed-off-by: Mark Brown <broonie@kernel.org> --- Documentation/arch/arm64/elf_hwcaps.rst | 6 +++--- arch/arm64/include/asm/cpufeature.h | 3 ++- arch/arm64/include/asm/hwcap.h | 6 +++++- arch/arm64/include/uapi/asm/hwcap.h | 4 ++++ arch/arm64/kernel/cpufeature.c | 6 ++++++ 5 files changed, 20 insertions(+), 5 deletions(-)