[v2,0/2] Allwinner A10 SPI controller emulation

Message

Strahinja Jankovic Oct. 1, 2024, 10:13 p.m. UTC

This patch set introduces the SPI controller emulation for Allwinner A10
SoC and Cubieboard.

Only master-mode functionality of the SPI controller is implemented.

Since U-Boot and Linux SPI drivers for Allwinner A10 perform only
byte-wide CPU access to the transmit and receive registers of the
controller, the emulated controller does not implement DMA handling,
and supports only byte-wide access to transmit and receive registers
(half-word and word access will be treated as byte access).

* diff from v1:

- split patch into two parts, one implementing the peripheral and
  another for integrating peripheral into Allwinner A10 description
- fixed issue with CS level handling when channel is not selected (idle
  mode); this was discovered when CS level handling was converted to a
  separate function
- updated read and write register handling to log error when byte and
  half-word access not aligned to 4-byte boundary is performed
- updated SPDX license tags for both header and c files
- various minor fixes suggested in review

Strahinja Jankovic (2):
  hw/ssi: Allwinner A10 SPI emulation
  {hw/arm,docs/system/arm}: Add SPI to Allwinner A10

 docs/system/arm/cubieboard.rst     |   1 +
 hw/arm/Kconfig                     |   1 +
 hw/arm/allwinner-a10.c             |   8 +
 hw/ssi/Kconfig                     |   4 +
 hw/ssi/allwinner-a10-spi.c         | 561 +++++++++++++++++++++++++++++
 hw/ssi/meson.build                 |   1 +
 hw/ssi/trace-events                |  10 +
 include/hw/arm/allwinner-a10.h     |   2 +
 include/hw/ssi/allwinner-a10-spi.h |  57 +++
 9 files changed, 645 insertions(+)
 create mode 100644 hw/ssi/allwinner-a10-spi.c
 create mode 100644 include/hw/ssi/allwinner-a10-spi.h

Comments

Peter Maydell Oct. 8, 2024, 11:42 a.m. UTC | #1

On Tue, 1 Oct 2024 at 23:14, Strahinja Jankovic
<[e-mail]> wrote:
>
> This patch set introduces the SPI controller emulation for Allwinner A10
> SoC and Cubieboard.
>
> Only master-mode functionality of the SPI controller is implemented.
>
> Since U-Boot and Linux SPI drivers for Allwinner A10 perform only
> byte-wide CPU access to the transmit and receive registers of the
> controller, the emulated controller does not implement DMA handling,
> and supports only byte-wide access to transmit and receive registers
> (half-word and word access will be treated as byte access).



Applied to target-arm.next, thanks.

-- PMM