| Message ID | 20240924204222.246862-29-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Reconcile i915's and xe's display power mgt sequences | expand |
-----Original Message----- From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Rodrigo Vivi Sent: Tuesday, September 24, 2024 1:36 PM To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org Cc: Deak, Imre <imre.deak@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com> Subject: [PATCH 28/31] drm/xe/display: Move display runtime suspend to a later point > > On runtime suspend (regardless of d3cold), there's no need > to perform the display power sequences before we disable the GT > and IRQ. > > In a matter of fact, the i915 runtime suspend needs to > disable power, which asserts that IRQs are disabled. > So, before the runtime_pm sequences can be reconciled, it is needed to > ensure that the Xe's IRQ are disabled before the display. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> LGTM. Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> -Jonathan Cavitt > --- > drivers/gpu/drm/xe/xe_pm.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c > index 4cacf4b33d83..16854215bea6 100644 > --- a/drivers/gpu/drm/xe/xe_pm.c > +++ b/drivers/gpu/drm/xe/xe_pm.c > @@ -402,8 +402,6 @@ int xe_pm_runtime_suspend(struct xe_device *xe) > xe_bo_runtime_pm_release_mmap_offset(bo); > mutex_unlock(&xe->mem_access.vram_userfault.lock); > > - xe_display_pm_runtime_suspend(xe); > - > if (xe->d3cold.allowed) { > err = xe_bo_evict_all(xe); > if (err) > @@ -418,6 +416,7 @@ int xe_pm_runtime_suspend(struct xe_device *xe) > > xe_irq_suspend(xe); > > + xe_display_pm_runtime_suspend(xe); > xe_display_pm_runtime_suspend_late(xe); > out: > if (err) > -- > 2.46.0 > >
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 4cacf4b33d83..16854215bea6 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -402,8 +402,6 @@ int xe_pm_runtime_suspend(struct xe_device *xe) xe_bo_runtime_pm_release_mmap_offset(bo); mutex_unlock(&xe->mem_access.vram_userfault.lock); - xe_display_pm_runtime_suspend(xe); - if (xe->d3cold.allowed) { err = xe_bo_evict_all(xe); if (err) @@ -418,6 +416,7 @@ int xe_pm_runtime_suspend(struct xe_device *xe) xe_irq_suspend(xe); + xe_display_pm_runtime_suspend(xe); xe_display_pm_runtime_suspend_late(xe); out: if (err)
On runtime suspend (regardless of d3cold), there's no need to perform the display power sequences before we disable the GT and IRQ. In a matter of fact, the i915 runtime suspend needs to disable power, which asserts that IRQs are disabled. So, before the runtime_pm sequences can be reconciled, it is needed to ensure that the Xe's IRQ are disabled before the display. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/xe/xe_pm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)