diff mbox series

[v2] iommu/arm-smmu: Clarify MMU-500 CPRE workaround

Message ID dfa82171b5248ad7cf1f25592101a6eec36b8c9a.1728400877.git.robin.murphy@arm.com (mailing list archive)
State New, archived
Headers show
Series [v2] iommu/arm-smmu: Clarify MMU-500 CPRE workaround | expand

Commit Message

Robin Murphy Oct. 8, 2024, 3:21 p.m. UTC
CPRE workarounds are implicated in at least 5 MMU-500 errata, some of
which remain unfixed. The comment and warning message have proven to be
unhelpfully misleading about this scope, so reword them to get the point
across with less risk of going out of date or confusing users.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>

---
v2: Further clarify that SACR is the likely culprit, not ACR which we
    do already configure
---
 drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Will Deacon Oct. 8, 2024, 6:24 p.m. UTC | #1
On Tue, 08 Oct 2024 16:21:17 +0100, Robin Murphy wrote:
> CPRE workarounds are implicated in at least 5 MMU-500 errata, some of
> which remain unfixed. The comment and warning message have proven to be
> unhelpfully misleading about this scope, so reword them to get the point
> across with less risk of going out of date or confusing users.
> 
> 

Applied to will (for-joerg/arm-smmu/fixes), thanks!

[1/1] iommu/arm-smmu: Clarify MMU-500 CPRE workaround
      https://git.kernel.org/will/c/0dfe314cdd0d

Cheers,
diff mbox series

Patch

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
index 9dc772f2cbb2..99030e6b16e7 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
@@ -130,7 +130,7 @@  int arm_mmu500_reset(struct arm_smmu_device *smmu)
 
 	/*
 	 * Disable MMU-500's not-particularly-beneficial next-page
-	 * prefetcher for the sake of errata #841119 and #826419.
+	 * prefetcher for the sake of at least 5 known errata.
 	 */
 	for (i = 0; i < smmu->num_context_banks; ++i) {
 		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
@@ -138,7 +138,7 @@  int arm_mmu500_reset(struct arm_smmu_device *smmu)
 		arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg);
 		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
 		if (reg & ARM_MMU500_ACTLR_CPRE)
-			dev_warn_once(smmu->dev, "Failed to disable prefetcher [errata #841119 and #826419], check ACR.CACHE_LOCK\n");
+			dev_warn_once(smmu->dev, "Failed to disable prefetcher for errata workarounds, check SACR.CACHE_LOCK\n");
 	}
 
 	return 0;