| Message ID | 20241001123807.605-4-alejandro.vallejo@cloud.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | x86: Expose consistent topology to guests | expand |
On 01.10.2024 14:37, Alejandro Vallejo wrote: > @@ -311,18 +310,15 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, > > case 0xb: > /* > - * In principle, this leaf is Intel-only. In practice, it is tightly > - * coupled with x2apic, and we offer an x2apic-capable APIC emulation > - * to guests on AMD hardware as well. > - * > - * TODO: Rework topology logic. > + * Don't expose topology information to PV guests. Exposed on HVM > + * along with x2APIC because they are tightly coupled. > */ > - if ( p->basic.x2apic ) > + if ( is_hvm_domain(d) && p->basic.x2apic ) This change isn't mentioned at all in the description, despite it having the potential of introducing a (perceived) regression. See the comments near the top of calculate_pv_max_policy() and near the top of domain_cpu_policy_changed(). What's wrong with ... > { > *(uint8_t *)&res->c = subleaf; > > /* Fix the x2APIC identifier. */ > - res->d = v->vcpu_id * 2; > + res->d = vlapic_x2apic_id(vcpu_vlapic(v)); ... res->d = is_hvm_domain(d) ? vlapic_x2apic_id(vcpu_vlapic(v)) : v->vcpu_id * 2; ? > --- a/xen/arch/x86/hvm/vlapic.c > +++ b/xen/arch/x86/hvm/vlapic.c > @@ -1090,7 +1090,7 @@ static uint32_t x2apic_ldr_from_id(uint32_t id) > static void set_x2apic_id(struct vlapic *vlapic) > { > const struct vcpu *v = vlapic_vcpu(vlapic); > - uint32_t apic_id = v->vcpu_id * 2; > + uint32_t apic_id = vlapic->hw.x2apic_id; Any reason you're open-coding vlapic_x2apic_id() here and ... > @@ -1470,7 +1470,7 @@ void vlapic_reset(struct vlapic *vlapic) > if ( v->vcpu_id == 0 ) > vlapic->hw.apic_base_msr |= APIC_BASE_BSP; > > - vlapic_set_reg(vlapic, APIC_ID, (v->vcpu_id * 2) << 24); > + vlapic_set_reg(vlapic, APIC_ID, SET_xAPIC_ID(vlapic->hw.x2apic_id)); ... here? Jan
Hi, On Wed Oct 9, 2024 at 2:12 PM BST, Jan Beulich wrote: > On 01.10.2024 14:37, Alejandro Vallejo wrote: > > @@ -311,18 +310,15 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, > > > > case 0xb: > > /* > > - * In principle, this leaf is Intel-only. In practice, it is tightly > > - * coupled with x2apic, and we offer an x2apic-capable APIC emulation > > - * to guests on AMD hardware as well. > > - * > > - * TODO: Rework topology logic. > > + * Don't expose topology information to PV guests. Exposed on HVM > > + * along with x2APIC because they are tightly coupled. > > */ > > - if ( p->basic.x2apic ) > > + if ( is_hvm_domain(d) && p->basic.x2apic ) > > This change isn't mentioned at all in the description, despite it having the > potential of introducing a (perceived) regression. See the comments near the > top of calculate_pv_max_policy() and near the top of > domain_cpu_policy_changed(). What's wrong with ... > > > { > > *(uint8_t *)&res->c = subleaf; > > > > /* Fix the x2APIC identifier. */ > > - res->d = v->vcpu_id * 2; > > + res->d = vlapic_x2apic_id(vcpu_vlapic(v)); > > ... > > res->d = is_hvm_domain(d) ? vlapic_x2apic_id(vcpu_vlapic(v)) > : v->vcpu_id * 2; > > ? Hmmm. I haven't seem problems with PV guests, but that's a good point. While I suspect no PV guest would use this value for anything relevant (seeing how there's no actual APIC), handing out zeroes might still have bad consequences. Sure, I'll amend it. > > > --- a/xen/arch/x86/hvm/vlapic.c > > +++ b/xen/arch/x86/hvm/vlapic.c > > @@ -1090,7 +1090,7 @@ static uint32_t x2apic_ldr_from_id(uint32_t id) > > static void set_x2apic_id(struct vlapic *vlapic) > > { > > const struct vcpu *v = vlapic_vcpu(vlapic); > > - uint32_t apic_id = v->vcpu_id * 2; > > + uint32_t apic_id = vlapic->hw.x2apic_id; > > Any reason you're open-coding vlapic_x2apic_id() here and ... > > > @@ -1470,7 +1470,7 @@ void vlapic_reset(struct vlapic *vlapic) > > if ( v->vcpu_id == 0 ) > > vlapic->hw.apic_base_msr |= APIC_BASE_BSP; > > > > - vlapic_set_reg(vlapic, APIC_ID, (v->vcpu_id * 2) << 24); > > + vlapic_set_reg(vlapic, APIC_ID, SET_xAPIC_ID(vlapic->hw.x2apic_id)); > > ... here? Not a good one. vlapic_x2apic_id() exists mostly to allow self-contained accesses from outside this translation unit. It makes no harm using the accessor even inside, sure. > > Jan Cheers, Alejandro
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 2a777436ee27..dcbdeabadce9 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -138,10 +138,9 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, const struct cpu_user_regs *regs; case 0x1: - /* TODO: Rework topology logic. */ res->b &= 0x00ffffffu; if ( is_hvm_domain(d) ) - res->b |= (v->vcpu_id * 2) << 24; + res->b |= vlapic_x2apic_id(vcpu_vlapic(v)) << 24; /* TODO: Rework vPMU control in terms of toolstack choices. */ if ( vpmu_available(v) && @@ -311,18 +310,15 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, case 0xb: /* - * In principle, this leaf is Intel-only. In practice, it is tightly - * coupled with x2apic, and we offer an x2apic-capable APIC emulation - * to guests on AMD hardware as well. - * - * TODO: Rework topology logic. + * Don't expose topology information to PV guests. Exposed on HVM + * along with x2APIC because they are tightly coupled. */ - if ( p->basic.x2apic ) + if ( is_hvm_domain(d) && p->basic.x2apic ) { *(uint8_t *)&res->c = subleaf; /* Fix the x2APIC identifier. */ - res->d = v->vcpu_id * 2; + res->d = vlapic_x2apic_id(vcpu_vlapic(v)); } break; diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 101902cff889..02570f9dd63a 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1090,7 +1090,7 @@ static uint32_t x2apic_ldr_from_id(uint32_t id) static void set_x2apic_id(struct vlapic *vlapic) { const struct vcpu *v = vlapic_vcpu(vlapic); - uint32_t apic_id = v->vcpu_id * 2; + uint32_t apic_id = vlapic->hw.x2apic_id; uint32_t apic_ldr = x2apic_ldr_from_id(apic_id); /* @@ -1470,7 +1470,7 @@ void vlapic_reset(struct vlapic *vlapic) if ( v->vcpu_id == 0 ) vlapic->hw.apic_base_msr |= APIC_BASE_BSP; - vlapic_set_reg(vlapic, APIC_ID, (v->vcpu_id * 2) << 24); + vlapic_set_reg(vlapic, APIC_ID, SET_xAPIC_ID(vlapic->hw.x2apic_id)); vlapic_do_init(vlapic); } @@ -1538,6 +1538,16 @@ static void lapic_load_fixup(struct vlapic *vlapic) const struct vcpu *v = vlapic_vcpu(vlapic); uint32_t good_ldr = x2apic_ldr_from_id(vlapic->loaded.id); + /* + * Loading record without hw.x2apic_id in the save stream, calculate using + * the traditional "vcpu_id * 2" relation. There's an implicit assumption + * that vCPU0 always has x2APIC0, which is true for the old relation, and + * still holds under the new x2APIC generation algorithm. While that case + * goes through the conditional it's benign because it still maps to zero. + */ + if ( !vlapic->hw.x2apic_id ) + vlapic->hw.x2apic_id = v->vcpu_id * 2; + /* Skip fixups on xAPIC mode, or if the x2APIC LDR is already correct */ if ( !vlapic_x2apic_mode(vlapic) || (vlapic->loaded.ldr == good_ldr) ) @@ -1606,6 +1616,13 @@ static int cf_check lapic_check_hidden(const struct domain *d, APIC_BASE_EXTD ) return -EINVAL; + /* + * Fail migrations from newer versions of Xen where + * rsvd_zero is interpreted as something else. + */ + if ( s.rsvd_zero ) + return -EINVAL; + return 0; } @@ -1687,6 +1704,7 @@ int vlapic_init(struct vcpu *v) } vlapic->pt.source = PTSRC_lapic; + vlapic->hw.x2apic_id = 2 * v->vcpu_id; vlapic->regs_page = alloc_domheap_page(v->domain, MEMF_no_owner); if ( !vlapic->regs_page ) diff --git a/xen/arch/x86/include/asm/hvm/vlapic.h b/xen/arch/x86/include/asm/hvm/vlapic.h index 2c4ff94ae7a8..85c4a236b9f6 100644 --- a/xen/arch/x86/include/asm/hvm/vlapic.h +++ b/xen/arch/x86/include/asm/hvm/vlapic.h @@ -44,6 +44,7 @@ #define vlapic_xapic_mode(vlapic) \ (!vlapic_hw_disabled(vlapic) && \ !((vlapic)->hw.apic_base_msr & APIC_BASE_EXTD)) +#define vlapic_x2apic_id(vlapic) ((vlapic)->hw.x2apic_id) /* * Generic APIC bitmap vector update & search routines. diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/arch-x86/hvm/save.h index 7ecacadde165..1c2ec669ffc9 100644 --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -394,6 +394,8 @@ struct hvm_hw_lapic { uint32_t disabled; /* VLAPIC_xx_DISABLED */ uint32_t timer_divisor; uint64_t tdt_msr; + uint32_t x2apic_id; + uint32_t rsvd_zero; }; DECLARE_HVM_SAVE_TYPE(LAPIC, 5, struct hvm_hw_lapic);
This allows the initial x2APIC ID to be sent on the migration stream. This allows further changes to topology and APIC ID assignment without breaking existing hosts. Given the vlapic data is zero-extended on restore, fix up migrations from hosts without the field by setting it to the old convention if zero. The hardcoded mapping x2apic_id=2*vcpu_id is kept for the time being, but it's meant to be overriden by toolstack on a later patch with appropriate values. Signed-off-by: Alejandro Vallejo <alejandro.vallejo@cloud.com> --- xen/arch/x86/cpuid.c | 14 +++++--------- xen/arch/x86/hvm/vlapic.c | 22 ++++++++++++++++++++-- xen/arch/x86/include/asm/hvm/vlapic.h | 1 + xen/include/public/arch-x86/hvm/save.h | 2 ++ 4 files changed, 28 insertions(+), 11 deletions(-)