Message ID | 20241010-sg2002-v5-1-a0f2e582b932@bootlin.com (mailing list archive) |
---|---|
State | Handled Elsewhere |
Headers | show |
Series | Add board support for Sipeed LicheeRV Nano | expand |
Hello, sorry for the double email. On 10/10/24 5:07 PM, Thomas Bonnefille wrote: > Add initial device tree for the SG2002 RISC-V SoC by SOPHGO. > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > --- > The commit adding the bindings for the compatible "sophgo,sg2002-clint" > has been applied to Daniel Lezcano git tree. This commit may trigger the > bots because of this missing binding. > --- I wanted to say, that the comment above is no longer relevant because Daniel Lezcano's branch was applied in 6.11. Best regards, Thomas
On 2024/10/10 23:23, Thomas Bonnefille wrote: > Hello, sorry for the double email. > > On 10/10/24 5:07 PM, Thomas Bonnefille wrote: >> Add initial device tree for the SG2002 RISC-V SoC by SOPHGO. >> >> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> >> --- >> The commit adding the bindings for the compatible "sophgo,sg2002-clint" >> has been applied to Daniel Lezcano git tree. This commit may trigger the >> bots because of this missing binding. >> --- > > I wanted to say, that the comment above is no longer relevant because > Daniel Lezcano's branch was applied in 6.11. OK, I will remove it when PR this patch. Thanks, Chen > > Best regards, > Thomas
On Thu, Oct 10, 2024 at 05:07:06PM +0200, Thomas Bonnefille wrote: > Add initial device tree for the SG2002 RISC-V SoC by SOPHGO. > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > --- > The commit adding the bindings for the compatible "sophgo,sg2002-clint" > has been applied to Daniel Lezcano git tree. This commit may trigger the > bots because of this missing binding. > --- > arch/riscv/boot/dts/sophgo/sg2002.dtsi | 42 ++++++++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi > new file mode 100644 > index 0000000000000000000000000000000000000000..242fde84443f0d6a2c8476666dfa3d72727071b1 > --- /dev/null > +++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi > @@ -0,0 +1,42 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com> > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/pinctrl/pinctrl-sg2002.h> > +#include "cv18xx.dtsi" > + > +/ { > + compatible = "sophgo,sg2002"; > + > + memory@80000000 { > + device_type = "memory"; > + reg = <0x80000000 0x10000000>; > + }; > + > + soc { > + pinctrl: pinctrl@3008000 { I got the following waring: arch/riscv/boot/dts/sophgo/sg2002.dtsi:20.28-25.5: Warning (simple_bus_reg): /soc/pinctrl@3008000: simple-bus unit address format error, expected "3001000" Could you send a fix patch? Regards, Inochi > + compatible = "sophgo,sg2002-pinctrl"; > + reg = <0x03001000 0x1000>, > + <0x05027000 0x1000>; > + reg-names = "sys", "rtc"; > + }; > + }; > +}; > + > +&plic { > + compatible = "sophgo,sg2002-plic", "thead,c900-plic"; > +}; > + > +&clint { > + compatible = "sophgo,sg2002-clint", "thead,c900-clint"; > +}; > + > +&clk { > + compatible = "sophgo,sg2000-clk"; > +}; > + > +&sdhci0 { > + compatible = "sophgo,sg2002-dwcmshc"; > +}; > > -- > 2.47.0 >
diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..242fde84443f0d6a2c8476666dfa3d72727071b1 --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com> + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/pinctrl-sg2002.h> +#include "cv18xx.dtsi" + +/ { + compatible = "sophgo,sg2002"; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + pinctrl: pinctrl@3008000 { + compatible = "sophgo,sg2002-pinctrl"; + reg = <0x03001000 0x1000>, + <0x05027000 0x1000>; + reg-names = "sys", "rtc"; + }; + }; +}; + +&plic { + compatible = "sophgo,sg2002-plic", "thead,c900-plic"; +}; + +&clint { + compatible = "sophgo,sg2002-clint", "thead,c900-clint"; +}; + +&clk { + compatible = "sophgo,sg2000-clk"; +}; + +&sdhci0 { + compatible = "sophgo,sg2002-dwcmshc"; +};
Add initial device tree for the SG2002 RISC-V SoC by SOPHGO. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> --- The commit adding the bindings for the compatible "sophgo,sg2002-clint" has been applied to Daniel Lezcano git tree. This commit may trigger the bots because of this missing binding. --- arch/riscv/boot/dts/sophgo/sg2002.dtsi | 42 ++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)