| Message ID | 20241013221235.1585193-1-richard.henderson@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, 13 Oct 2024 at 23:20, Richard Henderson <richard.henderson@linaro.org> wrote: > > The following changes since commit 7e3b6d8063f245d27eecce5aabe624b5785f2a77: > > Merge tag 'crypto-fixes-pull-request' of https://gitlab.com/berrange/qemu into staging (2024-10-10 18:05:43 +0100) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241013 > > for you to fetch changes up to e530581ee06573fcf48c7f7a6c3f8ec6e5809243: > > target/arm: Fix alignment fault priority in get_phys_addr_lpae (2024-10-13 11:27:06 -0700) > > ---------------------------------------------------------------- > linux-user/i386: Emulate orig_ax > linux-user/vm86: Fix compilation with Clang > tcg: remove singlestep_enabled from DisasContextBase > accel/tcg: Add TCGCPUOps.tlb_fill_align > target/hppa: Handle alignment faults in hppa_get_physical_address > target/arm: Fix alignment fault priority in get_phys_addr_lpae > Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2 for any user-visible changes. -- PMM
The following changes since commit 7e3b6d8063f245d27eecce5aabe624b5785f2a77: Merge tag 'crypto-fixes-pull-request' of https://gitlab.com/berrange/qemu into staging (2024-10-10 18:05:43 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241013 for you to fetch changes up to e530581ee06573fcf48c7f7a6c3f8ec6e5809243: target/arm: Fix alignment fault priority in get_phys_addr_lpae (2024-10-13 11:27:06 -0700) ---------------------------------------------------------------- linux-user/i386: Emulate orig_ax linux-user/vm86: Fix compilation with Clang tcg: remove singlestep_enabled from DisasContextBase accel/tcg: Add TCGCPUOps.tlb_fill_align target/hppa: Handle alignment faults in hppa_get_physical_address target/arm: Fix alignment fault priority in get_phys_addr_lpae ---------------------------------------------------------------- Ilya Leoshkevich (5): include/exec: Introduce env_cpu_const() linux-user/i386: Emulate orig_ax target/i386/gdbstub: Factor out gdb_get_reg() and gdb_write_reg() target/i386/gdbstub: Expose orig_ax tests/tcg: Run test-proc-mappings.py on i386 Paolo Bonzini (1): tcg: remove singlestep_enabled from DisasContextBase Richard Henderson (20): accel/tcg: Assert noreturn from write-only page for atomics include/exec/memop: Move get_alignment_bits from tcg.h include/exec/memop: Rename get_alignment_bits include/exec/memop: Introduce memop_atomicity_bits accel/tcg: Add TCGCPUOps.tlb_fill_align accel/tcg: Use the alignment test in tlb_fill_align target/hppa: Add MemOp argument to hppa_get_physical_address target/hppa: Perform access rights before protection id check target/hppa: Fix priority of T, D, and B page faults target/hppa: Handle alignment faults in hppa_get_physical_address target/hppa: Implement TCGCPUOps.tlb_fill_align target/arm: Pass MemOp to get_phys_addr target/arm: Pass MemOp to get_phys_addr_with_space_nogpc target/arm: Pass MemOp to get_phys_addr_gpc target/arm: Pass MemOp to get_phys_addr_nogpc target/arm: Pass MemOp through get_phys_addr_twostage target/arm: Pass MemOp to get_phys_addr_lpae target/arm: Move device detection earlier in get_phys_addr_lpae target/arm: Implement TCGCPUOps.tlb_fill_align target/arm: Fix alignment fault priority in get_phys_addr_lpae Thomas Huth (1): linux-user/vm86: Fix compilation with Clang include/exec/cpu-common.h | 13 +- include/exec/memop.h | 47 +++++++ include/exec/translator.h | 2 - include/hw/core/cpu.h | 4 +- include/hw/core/tcg-cpu-ops.h | 26 ++++ include/qemu/typedefs.h | 1 + include/tcg/tcg.h | 23 ---- linux-user/qemu.h | 4 + target/arm/internals.h | 12 +- target/hppa/cpu.h | 8 +- target/i386/cpu.h | 1 + accel/tcg/cputlb.c | 160 +++++++++++----------- accel/tcg/translator.c | 1 - accel/tcg/user-exec.c | 4 +- linux-user/elfload.c | 6 +- linux-user/i386/cpu_loop.c | 3 + linux-user/vm86.c | 65 --------- target/arm/cpu.c | 2 +- target/arm/helper.c | 9 +- target/arm/ptw.c | 141 ++++++++++--------- target/arm/tcg/cpu-v7m.c | 2 +- target/arm/tcg/m_helper.c | 8 +- target/arm/tcg/tlb_helper.c | 49 +++---- target/arm/tcg/translate-a64.c | 4 +- target/hppa/cpu.c | 2 +- target/hppa/int_helper.c | 2 +- target/hppa/mem_helper.c | 55 +++++--- target/hppa/op_helper.c | 2 +- target/i386/cpu.c | 1 + target/i386/gdbstub.c | 102 +++++++++++--- target/mips/tcg/translate.c | 5 +- target/xtensa/translate.c | 2 +- tcg/tcg-op-ldst.c | 6 +- tcg/tcg.c | 2 +- configs/targets/i386-linux-user.mak | 2 +- configs/targets/x86_64-linux-user.mak | 2 +- gdb-xml/i386-32bit-linux.xml | 11 ++ gdb-xml/i386-64bit-linux.xml | 11 ++ tcg/arm/tcg-target.c.inc | 4 +- tcg/sparc64/tcg-target.c.inc | 2 +- tests/tcg/multiarch/gdbstub/test-proc-mappings.py | 17 +-- 41 files changed, 464 insertions(+), 359 deletions(-) create mode 100644 gdb-xml/i386-32bit-linux.xml create mode 100644 gdb-xml/i386-64bit-linux.xml