@@ -13,7 +13,7 @@
* . = START;
* __init_begin = .;
* HEAD_TEXT_SECTION
- * INIT_TEXT_SECTION(PAGE_SIZE)
+ * INIT_TEXT_SECTION(PAGE_SIZE_MAX)
* INIT_DATA_SECTION(...)
* PERCPU_SECTION(CACHELINE_SIZE)
* __init_end = .;
@@ -23,7 +23,7 @@
* _etext = .;
*
* _sdata = .;
- * RO_DATA(PAGE_SIZE)
+ * RO_DATA(PAGE_SIZE_MAX)
* RW_DATA(...)
* _edata = .;
*
@@ -371,10 +371,10 @@
* Data section helpers
*/
#define NOSAVE_DATA \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
__nosave_begin = .; \
*(.data..nosave) \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
__nosave_end = .;
#define PAGE_ALIGNED_DATA(page_align) \
@@ -733,9 +733,9 @@
. = ALIGN(bss_align); \
.bss : AT(ADDR(.bss) - LOAD_OFFSET) { \
BSS_FIRST_SECTIONS \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
*(.bss..page_aligned) \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
*(.dynbss) \
*(BSS_MAIN) \
*(COMMON) \
@@ -950,9 +950,9 @@
*/
#ifdef CONFIG_AMD_MEM_ENCRYPT
#define PERCPU_DECRYPTED_SECTION \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
*(.data..percpu..decrypted) \
- . = ALIGN(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE_MAX);
#else
#define PERCPU_DECRYPTED_SECTION
#endif
@@ -1030,7 +1030,7 @@
#define PERCPU_INPUT(cacheline) \
__per_cpu_start = .; \
*(.data..percpu..first) \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
*(.data..percpu..page_aligned) \
. = ALIGN(cacheline); \
*(.data..percpu..read_mostly) \
@@ -1075,16 +1075,16 @@
* PERCPU_SECTION - define output section for percpu area, simple version
* @cacheline: cacheline size
*
- * Align to PAGE_SIZE and outputs output section for percpu area. This
+ * Align to PAGE_SIZE_MAX and outputs output section for percpu area. This
* macro doesn't manipulate @vaddr or @phdr and __per_cpu_load and
* __per_cpu_start will be identical.
*
- * This macro is equivalent to ALIGN(PAGE_SIZE); PERCPU_VADDR(@cacheline,,)
+ * This macro is equivalent to ALIGN(PAGE_SIZE_MAX); PERCPU_VADDR(@cacheline,,)
* except that __per_cpu_load is defined as a relative symbol against
* .data..percpu which is required for relocatable x86_32 configuration.
*/
#define PERCPU_SECTION(cacheline) \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
.data..percpu : AT(ADDR(.data..percpu) - LOAD_OFFSET) { \
__per_cpu_load = .; \
PERCPU_INPUT(cacheline) \
@@ -1102,15 +1102,15 @@
* All sections are combined in a single .data section.
* The sections following CONSTRUCTORS are arranged so their
* typical alignment matches.
- * A cacheline is typical/always less than a PAGE_SIZE so
+ * A cacheline is typical/always less than a PAGE_SIZE_MAX so
* the sections that has this restriction (or similar)
- * is located before the ones requiring PAGE_SIZE alignment.
- * NOSAVE_DATA starts and ends with a PAGE_SIZE alignment which
+ * is located before the ones requiring PAGE_SIZE_MAX alignment.
+ * NOSAVE_DATA starts and ends with a PAGE_SIZE_MAX alignment which
* matches the requirement of PAGE_ALIGNED_DATA.
*
* use 0 as page_align if page_aligned data is not used */
#define RW_DATA(cacheline, pagealigned, inittask) \
- . = ALIGN(PAGE_SIZE); \
+ . = ALIGN(PAGE_SIZE_MAX); \
.data : AT(ADDR(.data) - LOAD_OFFSET) { \
INIT_TASK_DATA(inittask) \
NOSAVE_DATA \
@@ -36,8 +36,8 @@
__stringify(name))
#endif
-#define __page_aligned_data __section(".data..page_aligned") __aligned(PAGE_SIZE)
-#define __page_aligned_bss __section(".bss..page_aligned") __aligned(PAGE_SIZE)
+#define __page_aligned_data __section(".data..page_aligned") __aligned(PAGE_SIZE_MAX)
+#define __page_aligned_bss __section(".bss..page_aligned") __aligned(PAGE_SIZE_MAX)
/*
* For assembly routines.
@@ -156,11 +156,11 @@
*/
#define DECLARE_PER_CPU_PAGE_ALIGNED(type, name) \
DECLARE_PER_CPU_SECTION(type, name, "..page_aligned") \
- __aligned(PAGE_SIZE)
+ __aligned(PAGE_SIZE_MAX)
#define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \
DEFINE_PER_CPU_SECTION(type, name, "..page_aligned") \
- __aligned(PAGE_SIZE)
+ __aligned(PAGE_SIZE_MAX)
/*
* Declaration/definition used for per-CPU variables that must be read mostly.
Increase alignment of structures requiring at least PAGE_SIZE alignment to PAGE_SIZE_MAX. For compile-time PAGE_SIZE, PAGE_SIZE_MAX == PAGE_SIZE so there is no change. For boot-time PAGE_SIZE, PAGE_SIZE_MAX is the largest selectable page size. Signed-off-by: Ryan Roberts <ryan.roberts@arm.com> --- ***NOTE*** Any confused maintainers may want to read the cover note here for context: https://lore.kernel.org/all/20241014105514.3206191-1-ryan.roberts@arm.com/ include/asm-generic/vmlinux.lds.h | 32 +++++++++++++++---------------- include/linux/linkage.h | 4 ++-- include/linux/percpu-defs.h | 4 ++-- 3 files changed, 20 insertions(+), 20 deletions(-)