| Message ID | 20241012174519.897-2-mario.limonciello@amd.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Mario Limonciello |
| Headers | show |
| Series | [1/4] cpufreq/amd-pstate: Use nominal perf for limits when boost is disabled | expand |
[AMD Official Use Only - AMD Internal Distribution Only] Hi Mario, > -----Original Message----- > From: Limonciello, Mario <Mario.Limonciello@amd.com> > Sent: Sunday, October 13, 2024 1:45 AM > To: Shenoy, Gautham Ranjal <gautham.shenoy@amd.com> > Cc: Yuan, Perry <Perry.Yuan@amd.com>; linux-kernel@vger.kernel.org; linux- > pm@vger.kernel.org; Ugwekar, Dhananjay <Dhananjay.Ugwekar@amd.com>; > Limonciello, Mario <Mario.Limonciello@amd.com> > Subject: [PATCH 2/4] cpufreq/amd-pstate: Don't update CPPC request in > amd_pstate_cpu_boost_update() > > When boost is changed the CPPC value is changed in > amd_pstate_cpu_boost_update() but then changed again when > refresh_frequency_limits() and all it's callbacks occur. The first is a pointless write, > so instead just update the limits for the policy and let the policy refresh anchor > everything properly. > > Fixes: c8c68c38b56f ("cpufreq: amd-pstate: initialize core precision boost state") > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 24 +----------------------- > 1 file changed, 1 insertion(+), 23 deletions(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index > dfa9a146769b..13dec8b1e7a8 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -665,34 +665,12 @@ static void amd_pstate_adjust_perf(unsigned int cpu, > static int amd_pstate_cpu_boost_update(struct cpufreq_policy *policy, bool on) { > struct amd_cpudata *cpudata = policy->driver_data; > - struct cppc_perf_ctrls perf_ctrls; > - u32 highest_perf, nominal_perf, nominal_freq, max_freq; > + u32 nominal_freq, max_freq; > int ret = 0; > > - highest_perf = READ_ONCE(cpudata->highest_perf); > - nominal_perf = READ_ONCE(cpudata->nominal_perf); > nominal_freq = READ_ONCE(cpudata->nominal_freq); > max_freq = READ_ONCE(cpudata->max_freq); > > - if (boot_cpu_has(X86_FEATURE_CPPC)) { > - u64 value = READ_ONCE(cpudata->cppc_req_cached); > - > - value &= ~GENMASK_ULL(7, 0); > - value |= on ? highest_perf : nominal_perf; > - WRITE_ONCE(cpudata->cppc_req_cached, value); The original idea was to update CPU firmware MSR register to limit Frequency from lowlevel, If the not updating MSR, could you please check if the boost off can limit the frequency from power firmware? If the limitation is working or not needed, please pick the flag, Reviewed-by: Perry Yuan <perry.yuan@amd.com>. Perry. > - > - wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); > - } else { > - perf_ctrls.max_perf = on ? highest_perf : nominal_perf; > - ret = cppc_set_perf(cpudata->cpu, &perf_ctrls); > - if (ret) { > - cpufreq_cpu_release(policy); > - pr_debug("Failed to set max perf on CPU:%d. ret:%d\n", > - cpudata->cpu, ret); > - return ret; > - } > - } > - > if (on) > policy->cpuinfo.max_freq = max_freq; > else if (policy->cpuinfo.max_freq > nominal_freq * 1000) > -- > 2.43.0
Hello Mario, [..snip..] > > > > When boost is changed the CPPC value is changed in > > amd_pstate_cpu_boost_update() but then changed again when > > refresh_frequency_limits() and all it's callbacks occur. The first is a pointless write, > > so instead just update the limits for the policy and let the policy refresh anchor > > everything properly. > > > > Fixes: c8c68c38b56f ("cpufreq: amd-pstate: initialize core precision boost state") > > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > > --- > > drivers/cpufreq/amd-pstate.c | 24 +----------------------- > > 1 file changed, 1 insertion(+), 23 deletions(-) > > > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index > > dfa9a146769b..13dec8b1e7a8 100644 > > --- a/drivers/cpufreq/amd-pstate.c > > +++ b/drivers/cpufreq/amd-pstate.c > > @@ -665,34 +665,12 @@ static void amd_pstate_adjust_perf(unsigned int cpu, > > static int amd_pstate_cpu_boost_update(struct cpufreq_policy *policy, bool on) { > > struct amd_cpudata *cpudata = policy->driver_data; > > - struct cppc_perf_ctrls perf_ctrls; > > - u32 highest_perf, nominal_perf, nominal_freq, max_freq; > > + u32 nominal_freq, max_freq; > > int ret = 0; > > > > - highest_perf = READ_ONCE(cpudata->highest_perf); > > - nominal_perf = READ_ONCE(cpudata->nominal_perf); > > nominal_freq = READ_ONCE(cpudata->nominal_freq); > > max_freq = READ_ONCE(cpudata->max_freq); > > > > - if (boot_cpu_has(X86_FEATURE_CPPC)) { > > - u64 value = READ_ONCE(cpudata->cppc_req_cached); > > - > > - value &= ~GENMASK_ULL(7, 0); > > - value |= on ? highest_perf : nominal_perf; > > - WRITE_ONCE(cpudata->cppc_req_cached, value); > > - > > - wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); So, for amd-pstate-epp driver refresh_frequency_limits() --> cpufreq_set_policy() --> amd_pstate_epp_set_policy() --> amd_pstate_epp_update_limit() will ensure that the MSR is updated with the is updated with the value after Patch 1. > > - } else { > > - perf_ctrls.max_perf = on ? highest_perf : nominal_perf; > > - ret = cppc_set_perf(cpudata->cpu, &perf_ctrls); refresh_frequency_limits() --> cpufreq_start_governor() --> governor->limits() --> cpufreq_policy_apply_limits() --> __cpufreq_driver_target() --> amd_pstate_target() --> amd_pstate_update_freq() --> amd_pstate_update() So these updates in amd_pstate_cpu_boost_update() seem redundant. Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> -- Thanks and Regards gautham.
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index dfa9a146769b..13dec8b1e7a8 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -665,34 +665,12 @@ static void amd_pstate_adjust_perf(unsigned int cpu, static int amd_pstate_cpu_boost_update(struct cpufreq_policy *policy, bool on) { struct amd_cpudata *cpudata = policy->driver_data; - struct cppc_perf_ctrls perf_ctrls; - u32 highest_perf, nominal_perf, nominal_freq, max_freq; + u32 nominal_freq, max_freq; int ret = 0; - highest_perf = READ_ONCE(cpudata->highest_perf); - nominal_perf = READ_ONCE(cpudata->nominal_perf); nominal_freq = READ_ONCE(cpudata->nominal_freq); max_freq = READ_ONCE(cpudata->max_freq); - if (boot_cpu_has(X86_FEATURE_CPPC)) { - u64 value = READ_ONCE(cpudata->cppc_req_cached); - - value &= ~GENMASK_ULL(7, 0); - value |= on ? highest_perf : nominal_perf; - WRITE_ONCE(cpudata->cppc_req_cached, value); - - wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value); - } else { - perf_ctrls.max_perf = on ? highest_perf : nominal_perf; - ret = cppc_set_perf(cpudata->cpu, &perf_ctrls); - if (ret) { - cpufreq_cpu_release(policy); - pr_debug("Failed to set max perf on CPU:%d. ret:%d\n", - cpudata->cpu, ret); - return ret; - } - } - if (on) policy->cpuinfo.max_freq = max_freq; else if (policy->cpuinfo.max_freq > nominal_freq * 1000)
When boost is changed the CPPC value is changed in amd_pstate_cpu_boost_update() but then changed again when refresh_frequency_limits() and all it's callbacks occur. The first is a pointless write, so instead just update the limits for the policy and let the policy refresh anchor everything properly. Fixes: c8c68c38b56f ("cpufreq: amd-pstate: initialize core precision boost state") Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- drivers/cpufreq/amd-pstate.c | 24 +----------------------- 1 file changed, 1 insertion(+), 23 deletions(-)