| Message ID | 20241017112036.368772-1-konrada@google.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | iommu/mediatek: Add PGTABLE_PA_35_EN to mt8186 platform data | expand |
On Thu, 2024-10-17 at 11:20 +0000, Konrad Adamczyk wrote: > > External email : Please do not click links or open attachments until > you have verified the sender or the content. > The MT8186 chip supports 35-bit physical addresses in page table > [1]. > Set this platform flag. > > [1] MT8186G_Application Processor Functional Specification_v1.0 > > Signed-off-by: Konrad Adamczyk <konrada@google.com> Reviewed-by: Yong Wu <yong.wu@mediatek.com> > --- > drivers/iommu/mtk_iommu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 6a2707fe7a78..c45313c43b9e 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -1599,7 +1599,7 @@ static const unsigned int > mt8186_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK > static const struct mtk_iommu_plat_data mt8186_data_mm = { > .m4u_plat = M4U_MT8186, > .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN | > - WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM, > + WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM | PGTABLE_PA_35_EN, > .larbid_remap = {{0}, {1, MTK_INVALID_LARBID, 8}, {4}, {7}, {2}, > {9, 11, 19, 20}, > {MTK_INVALID_LARBID, 14, 16}, > {MTK_INVALID_LARBID, 13, MTK_INVALID_LARBID, 17}}, > -- > 2.47.0.105.g07ac214952-goog >
On Thu, Oct 17, 2024 at 11:20:36AM +0000, Konrad Adamczyk wrote: > drivers/iommu/mtk_iommu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Applied, thanks.
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 6a2707fe7a78..c45313c43b9e 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -1599,7 +1599,7 @@ static const unsigned int mt8186_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK static const struct mtk_iommu_plat_data mt8186_data_mm = { .m4u_plat = M4U_MT8186, .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN | - WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM, + WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM | PGTABLE_PA_35_EN, .larbid_remap = {{0}, {1, MTK_INVALID_LARBID, 8}, {4}, {7}, {2}, {9, 11, 19, 20}, {MTK_INVALID_LARBID, 14, 16}, {MTK_INVALID_LARBID, 13, MTK_INVALID_LARBID, 17}},
The MT8186 chip supports 35-bit physical addresses in page table [1]. Set this platform flag. [1] MT8186G_Application Processor Functional Specification_v1.0 Signed-off-by: Konrad Adamczyk <konrada@google.com> --- drivers/iommu/mtk_iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)