| Message ID | 20241007134424.859467-1-catalin.popescu@leica-geosystems.com (mailing list archive) |
|---|---|
| State | In Next, archived |
| Headers | show |
| Series | arm64: dts: imx8mp: add cpuidle state "cpu-pd-wait" | expand |
On Mon, Oct 07, 2024 at 03:44:24PM +0200, Catalin Popescu wrote: > So far, only WFI is supported on i.MX8mp platform. Add support for > deeper cpuidle state "cpu-pd-wait" that would allow for better power > usage during runtime. This is a port from NXP downstream kernel. > > Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com> Applied, thanks!
Adding more people. On 07/10/2024 15:44, Catalin Popescu wrote: > So far, only WFI is supported on i.MX8mp platform. Add support for > deeper cpuidle state "cpu-pd-wait" that would allow for better power > usage during runtime. This is a port from NXP downstream kernel. > > Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index f3531cfb0d79..8b1e0ca248d1 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -47,6 +47,20 @@ cpus { > #address-cells = <1>; > #size-cells = <0>; > > + idle-states { > + entry-method = "psci"; > + > + cpu_pd_wait: cpu-pd-wait { > + compatible = "arm,idle-state"; > + arm,psci-suspend-param = <0x0010033>; > + local-timer-stop; > + entry-latency-us = <1000>; > + exit-latency-us = <700>; > + min-residency-us = <2700>; > + wakeup-latency-us = <1500>; > + }; > + }; > + > A53_0: cpu@0 { > device_type = "cpu"; > compatible = "arm,cortex-a53"; > @@ -65,6 +79,7 @@ A53_0: cpu@0 { > nvmem-cell-names = "speed_grade"; > operating-points-v2 = <&a53_opp_table>; > #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > }; > > A53_1: cpu@1 { > @@ -83,6 +98,7 @@ A53_1: cpu@1 { > next-level-cache = <&A53_L2>; > operating-points-v2 = <&a53_opp_table>; > #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > }; > > A53_2: cpu@2 { > @@ -101,6 +117,7 @@ A53_2: cpu@2 { > next-level-cache = <&A53_L2>; > operating-points-v2 = <&a53_opp_table>; > #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > }; > > A53_3: cpu@3 { > @@ -119,6 +136,7 @@ A53_3: cpu@3 { > next-level-cache = <&A53_L2>; > operating-points-v2 = <&a53_opp_table>; > #cooling-cells = <2>; > + cpu-idle-states = <&cpu_pd_wait>; > }; > > A53_L2: l2-cache0 { > > base-commit: 58ca61c1a866bfdaa5e19fb19a2416764f847d75 > prerequisite-patch-id: 0000000000000000000000000000000000000000
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index f3531cfb0d79..8b1e0ca248d1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -47,6 +47,20 @@ cpus { #address-cells = <1>; #size-cells = <0>; + idle-states { + entry-method = "psci"; + + cpu_pd_wait: cpu-pd-wait { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010033>; + local-timer-stop; + entry-latency-us = <1000>; + exit-latency-us = <700>; + min-residency-us = <2700>; + wakeup-latency-us = <1500>; + }; + }; + A53_0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; @@ -65,6 +79,7 @@ A53_0: cpu@0 { nvmem-cell-names = "speed_grade"; operating-points-v2 = <&a53_opp_table>; #cooling-cells = <2>; + cpu-idle-states = <&cpu_pd_wait>; }; A53_1: cpu@1 { @@ -83,6 +98,7 @@ A53_1: cpu@1 { next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; #cooling-cells = <2>; + cpu-idle-states = <&cpu_pd_wait>; }; A53_2: cpu@2 { @@ -101,6 +117,7 @@ A53_2: cpu@2 { next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; #cooling-cells = <2>; + cpu-idle-states = <&cpu_pd_wait>; }; A53_3: cpu@3 { @@ -119,6 +136,7 @@ A53_3: cpu@3 { next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; #cooling-cells = <2>; + cpu-idle-states = <&cpu_pd_wait>; }; A53_L2: l2-cache0 {
So far, only WFI is supported on i.MX8mp platform. Add support for deeper cpuidle state "cpu-pd-wait" that would allow for better power usage during runtime. This is a port from NXP downstream kernel. Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) base-commit: 58ca61c1a866bfdaa5e19fb19a2416764f847d75 prerequisite-patch-id: 0000000000000000000000000000000000000000