| Message ID | 20241021175509.2079-3-mario.limonciello@amd.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | Adjustments for AMD heterogeneous designs | expand |
On 10/21/2024 12:55, Mario Limonciello wrote: > X86_FEATURE_AMD_HETEROGENEOUS_CORES makes it clear this is an AMD feature > and matches the APM value of HeterogeneousCores > > Suggested-by: Borislav Petkov <bp@alien8.de> > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > --- > arch/x86/include/asm/cpufeatures.h | 2 +- > arch/x86/kernel/cpu/amd.c | 2 +- > arch/x86/kernel/cpu/scattered.c | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 424bb7ae8914a..7f6c9fc465293 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -473,7 +473,7 @@ > #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ > #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ > #define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */ > -#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */ > +#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */ > > /* > * BUG word(s) > diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c > index 8ad5f1385f0ec..0f533e6260d29 100644 > --- a/arch/x86/kernel/cpu/amd.c > +++ b/arch/x86/kernel/cpu/amd.c > @@ -1223,7 +1223,7 @@ enum amd_core_type amd_get_core_type(void) > core_type :4; > } props; > > - if (!cpu_feature_enabled(X86_FEATURE_HETERO_CORE_TOPOLOGY)) > + if (!cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES)) > return CPU_CORE_TYPE_NO_HETERO_SUP; > > cpuid_leaf_reg(0x80000026, CPUID_EBX, &props); > diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c > index d7f2c19abce33..307a917415343 100644 > --- a/arch/x86/kernel/cpu/scattered.c > +++ b/arch/x86/kernel/cpu/scattered.c > @@ -52,7 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = { > { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, > { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, > { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, > - { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, 0x80000026, 0 }, > + { X86_FEATURE_AMD_HETEROGENEOUS_CORES, CPUID_EAX, 30, 0x80000026, 0 }, > { 0, 0, 0, 0, 0 } > }; > I talked to Boris offline about this and I misinterpreted Rafael's intent with "the former". The original patches will need to be dropped and I will redo patches 2 and 4 in this series considering that.
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 424bb7ae8914a..7f6c9fc465293 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -473,7 +473,7 @@ #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ #define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */ -#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */ +#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */ /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 8ad5f1385f0ec..0f533e6260d29 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -1223,7 +1223,7 @@ enum amd_core_type amd_get_core_type(void) core_type :4; } props; - if (!cpu_feature_enabled(X86_FEATURE_HETERO_CORE_TOPOLOGY)) + if (!cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES)) return CPU_CORE_TYPE_NO_HETERO_SUP; cpuid_leaf_reg(0x80000026, CPUID_EBX, &props); diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index d7f2c19abce33..307a917415343 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -52,7 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, - { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, 0x80000026, 0 }, + { X86_FEATURE_AMD_HETEROGENEOUS_CORES, CPUID_EAX, 30, 0x80000026, 0 }, { 0, 0, 0, 0, 0 } };
X86_FEATURE_AMD_HETEROGENEOUS_CORES makes it clear this is an AMD feature and matches the APM value of HeterogeneousCores Suggested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- arch/x86/include/asm/cpufeatures.h | 2 +- arch/x86/kernel/cpu/amd.c | 2 +- arch/x86/kernel/cpu/scattered.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)