| Message ID | 20241010-sg2002-v5-0-a0f2e582b932@bootlin.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add board support for Sipeed LicheeRV Nano | expand |
On Thu, Oct 10, 2024 at 05:07:05PM +0200, Thomas Bonnefille wrote: > The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds > minimal device tree files for this board to make it boot to a basic > shell. > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > --- > Changes in v5: > - Add support for pinctrl > - Remove nodes for i2c0 and uart1 > - Drop dt-bindings patch that are already applied > - Link to v4: https://lore.kernel.org/r/20240711-sg2002-v4-0-d97ec2367095@bootlin.com > > Changes in v4: > - Add correct bindings configuration for SG2002 sdhci > - Drop commit "dt-bindings: timer: Add SOPHGO SG2002 clint" because it > has already been merged in Daniel Lezcano git tree. > - Link to v3: https://lore.kernel.org/r/20240709-sg2002-v3-0-af779c3d139d@bootlin.com > > Changes in v3: > - Remove /dts-v1/ directive from sg2002.dtsi file > - Add disable-wp property to sdhci node to avoid having a write > protected SD card > - Drop changes in cv18xx.dtsi and cv1800b.dtsi > - Add fallback compatible to cv1800b in SDHCI node of sg2002.dtsi > - Link to v2: https://lore.kernel.org/r/20240612-sg2002-v2-0-19a585af6846@bootlin.com > > Changes in v2: > - Add SDHCI support > - Change device tree name to match the Makefile > - Add oscillator frequency > - Add aliases to other UARTs > - Add aliases to GPIOs > - Move compatible for SDHCI from common DT to specific DT > - Link to v1: https://lore.kernel.org/r/20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com > > --- > Thomas Bonnefille (2): > riscv: dts: sophgo: Add initial SG2002 SoC device tree > riscv: dts: sophgo: Add LicheeRV Nano board device tree > > arch/riscv/boot/dts/sophgo/Makefile | 1 + > .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 95 ++++++++++++++++++++++ > arch/riscv/boot/dts/sophgo/sg2002.dtsi | 42 ++++++++++ > 3 files changed, 138 insertions(+) > --- > base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc > change-id: 20240515-sg2002-93dce1d263be > > Best regards, > -- > Thomas Bonnefille <thomas.bonnefille@bootlin.com> > LGTM. Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
On Thu, 10 Oct 2024 17:07:05 +0200, Thomas Bonnefille wrote: > The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds > minimal device tree files for this board to make it boot to a basic > shell. > > Applied to for-next, thanks! [1/2] riscv: dts: sophgo: Add initial SG2002 SoC device tree https://github.com/sophgo/linux/commit/93b61555f5095a44fe00df27399270867fbf278a [2/2] riscv: dts: sophgo: Add LicheeRV Nano board device tree https://github.com/sophgo/linux/commit/d32552307b6c526aa75a9f9a0ea29a4a7f1746b9 Thanks, Inochi
The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds minimal device tree files for this board to make it boot to a basic shell. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> --- Changes in v5: - Add support for pinctrl - Remove nodes for i2c0 and uart1 - Drop dt-bindings patch that are already applied - Link to v4: https://lore.kernel.org/r/20240711-sg2002-v4-0-d97ec2367095@bootlin.com Changes in v4: - Add correct bindings configuration for SG2002 sdhci - Drop commit "dt-bindings: timer: Add SOPHGO SG2002 clint" because it has already been merged in Daniel Lezcano git tree. - Link to v3: https://lore.kernel.org/r/20240709-sg2002-v3-0-af779c3d139d@bootlin.com Changes in v3: - Remove /dts-v1/ directive from sg2002.dtsi file - Add disable-wp property to sdhci node to avoid having a write protected SD card - Drop changes in cv18xx.dtsi and cv1800b.dtsi - Add fallback compatible to cv1800b in SDHCI node of sg2002.dtsi - Link to v2: https://lore.kernel.org/r/20240612-sg2002-v2-0-19a585af6846@bootlin.com Changes in v2: - Add SDHCI support - Change device tree name to match the Makefile - Add oscillator frequency - Add aliases to other UARTs - Add aliases to GPIOs - Move compatible for SDHCI from common DT to specific DT - Link to v1: https://lore.kernel.org/r/20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com --- Thomas Bonnefille (2): riscv: dts: sophgo: Add initial SG2002 SoC device tree riscv: dts: sophgo: Add LicheeRV Nano board device tree arch/riscv/boot/dts/sophgo/Makefile | 1 + .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 95 ++++++++++++++++++++++ arch/riscv/boot/dts/sophgo/sg2002.dtsi | 42 ++++++++++ 3 files changed, 138 insertions(+) --- base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc change-id: 20240515-sg2002-93dce1d263be Best regards,