| Message ID | 20240926141246.48282-1-francesco@dolcini.it (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1] drm/bridge: tc358768: Fix DSI command tx | expand |
Hello, On Thu, Sep 26, 2024 at 04:12:46PM +0200, Francesco Dolcini wrote: > From: Francesco Dolcini <francesco.dolcini@toradex.com> > > Wait for the command transmission to be completed in the DSI transfer > function polling for the dc_start bit to go back to idle state after the > transmission is started. > > This is documented in the datasheet and failures to do so lead to > commands corruption. > > Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") > Cc: stable@vger.kernel.org > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Just a gently ping on this, Francesco
On 26/09/2024 16:12, Francesco Dolcini wrote: > From: Francesco Dolcini <francesco.dolcini@toradex.com> > > Wait for the command transmission to be completed in the DSI transfer > function polling for the dc_start bit to go back to idle state after the > transmission is started. > > This is documented in the datasheet and failures to do so lead to > commands corruption. > > Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") > Cc: stable@vger.kernel.org > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> > --- > drivers/gpu/drm/bridge/tc358768.c | 21 +++++++++++++++++++-- > 1 file changed, 19 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c > index 0e8813278a2f..bb1750a3dab0 100644 > --- a/drivers/gpu/drm/bridge/tc358768.c > +++ b/drivers/gpu/drm/bridge/tc358768.c > @@ -125,6 +125,9 @@ > #define TC358768_DSI_CONFW_MODE_CLR (6 << 29) > #define TC358768_DSI_CONFW_ADDR_DSI_CONTROL (0x3 << 24) > > +/* TC358768_DSICMD_TX (0x0600) register */ > +#define TC358768_DSI_CMDTX_DC_START BIT(0) > + > static const char * const tc358768_supplies[] = { > "vddc", "vddmipi", "vddio" > }; > @@ -229,6 +232,21 @@ static void tc358768_update_bits(struct tc358768_priv *priv, u32 reg, u32 mask, > tc358768_write(priv, reg, tmp); > } > > +static void tc358768_dsicmd_tx(struct tc358768_priv *priv) > +{ > + u32 val; > + > + /* start transfer */ > + tc358768_write(priv, TC358768_DSICMD_TX, TC358768_DSI_CMDTX_DC_START); > + if (priv->error) > + return; > + > + /* wait transfer completion */ > + priv->error = regmap_read_poll_timeout(priv->regmap, TC358768_DSICMD_TX, val, > + (val & TC358768_DSI_CMDTX_DC_START) == 0, > + 100, 100000); > +} > + > static int tc358768_sw_reset(struct tc358768_priv *priv) > { > /* Assert Reset */ > @@ -516,8 +534,7 @@ static ssize_t tc358768_dsi_host_transfer(struct mipi_dsi_host *host, > } > } > > - /* start transfer */ > - tc358768_write(priv, TC358768_DSICMD_TX, 1); > + tc358768_dsicmd_tx(priv); > > ret = tc358768_clear_error(priv); > if (ret) Look good, I'll leave it here a few days if someone has comments Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Hello Neil, On Wed, Oct 23, 2024 at 10:03:20AM +0200, Neil Armstrong wrote: > On 26/09/2024 16:12, Francesco Dolcini wrote: > > From: Francesco Dolcini <francesco.dolcini@toradex.com> > > > > Wait for the command transmission to be completed in the DSI transfer > > function polling for the dc_start bit to go back to idle state after the > > transmission is started. > > > > This is documented in the datasheet and failures to do so lead to > > commands corruption. > > > > Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") > > Cc: stable@vger.kernel.org > > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> > > --- > > drivers/gpu/drm/bridge/tc358768.c | 21 +++++++++++++++++++-- > > 1 file changed, 19 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c > > index 0e8813278a2f..bb1750a3dab0 100644 > > --- a/drivers/gpu/drm/bridge/tc358768.c > > +++ b/drivers/gpu/drm/bridge/tc358768.c > > @@ -125,6 +125,9 @@ > > #define TC358768_DSI_CONFW_MODE_CLR (6 << 29) > > #define TC358768_DSI_CONFW_ADDR_DSI_CONTROL (0x3 << 24) > > +/* TC358768_DSICMD_TX (0x0600) register */ > > +#define TC358768_DSI_CMDTX_DC_START BIT(0) > > + > > static const char * const tc358768_supplies[] = { > > "vddc", "vddmipi", "vddio" > > }; > > @@ -229,6 +232,21 @@ static void tc358768_update_bits(struct tc358768_priv *priv, u32 reg, u32 mask, > > tc358768_write(priv, reg, tmp); > > } > > +static void tc358768_dsicmd_tx(struct tc358768_priv *priv) > > +{ > > + u32 val; > > + > > + /* start transfer */ > > + tc358768_write(priv, TC358768_DSICMD_TX, TC358768_DSI_CMDTX_DC_START); > > + if (priv->error) > > + return; > > + > > + /* wait transfer completion */ > > + priv->error = regmap_read_poll_timeout(priv->regmap, TC358768_DSICMD_TX, val, > > + (val & TC358768_DSI_CMDTX_DC_START) == 0, > > + 100, 100000); > > +} > > + > > static int tc358768_sw_reset(struct tc358768_priv *priv) > > { > > /* Assert Reset */ > > @@ -516,8 +534,7 @@ static ssize_t tc358768_dsi_host_transfer(struct mipi_dsi_host *host, > > } > > } > > - /* start transfer */ > > - tc358768_write(priv, TC358768_DSICMD_TX, 1); > > + tc358768_dsicmd_tx(priv); > > ret = tc358768_clear_error(priv); > > if (ret) > > Look good, I'll leave it here a few days if someone has comments Just a gently reminder, thanks > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Francesco
Hi, On Thu, 26 Sep 2024 16:12:46 +0200, Francesco Dolcini wrote: > Wait for the command transmission to be completed in the DSI transfer > function polling for the dc_start bit to go back to idle state after the > transmission is started. > > This is documented in the datasheet and failures to do so lead to > commands corruption. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-fixes) [1/1] drm/bridge: tc358768: Fix DSI command tx https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/32c4514455b2b8fde506f8c0962f15c7e4c26f1d
diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 0e8813278a2f..bb1750a3dab0 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -125,6 +125,9 @@ #define TC358768_DSI_CONFW_MODE_CLR (6 << 29) #define TC358768_DSI_CONFW_ADDR_DSI_CONTROL (0x3 << 24) +/* TC358768_DSICMD_TX (0x0600) register */ +#define TC358768_DSI_CMDTX_DC_START BIT(0) + static const char * const tc358768_supplies[] = { "vddc", "vddmipi", "vddio" }; @@ -229,6 +232,21 @@ static void tc358768_update_bits(struct tc358768_priv *priv, u32 reg, u32 mask, tc358768_write(priv, reg, tmp); } +static void tc358768_dsicmd_tx(struct tc358768_priv *priv) +{ + u32 val; + + /* start transfer */ + tc358768_write(priv, TC358768_DSICMD_TX, TC358768_DSI_CMDTX_DC_START); + if (priv->error) + return; + + /* wait transfer completion */ + priv->error = regmap_read_poll_timeout(priv->regmap, TC358768_DSICMD_TX, val, + (val & TC358768_DSI_CMDTX_DC_START) == 0, + 100, 100000); +} + static int tc358768_sw_reset(struct tc358768_priv *priv) { /* Assert Reset */ @@ -516,8 +534,7 @@ static ssize_t tc358768_dsi_host_transfer(struct mipi_dsi_host *host, } } - /* start transfer */ - tc358768_write(priv, TC358768_DSICMD_TX, 1); + tc358768_dsicmd_tx(priv); ret = tc358768_clear_error(priv); if (ret)