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EDAC/fsl-ddr: Add imx9 support
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On Wed, Oct 16, 2024 at 04:31:08PM -0400, Frank Li wrote: > Add imx9 support for fsl-ddr. > > Patch 1-2 is prepare patch, no function chagne > Patch 3 is small fix for bit shift > Patch 4 is dt binding patch. > Patch 5 is driver change to support imx9 First 5 queued. > Patch 6 is imx93 dts change This one goes through the respective SoC tree. Thx.
Add imx9 support for fsl-ddr. Patch 1-2 is prepare patch, no function chagne Patch 3 is small fix for bit shift Patch 4 is dt binding patch. Patch 5 is driver change to support imx9 Patch 6 is imx93 dts change Signed-off-by: Frank Li <Frank.Li@nxp.com> --- Changes in v3: - Rebase to edac-for-next https://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git/ - Use u64 to simplify fix for bad bit shift operations - Link to v2: https://lore.kernel.org/r/20241011-imx95_edac-v2-0-011b68290951@nxp.com Changes in v2: - Fix first patch build error. - Rewrite commit message with AI help. - Add Krzysztof'r review tag for binding doc. - Link to v1: https://lore.kernel.org/r/20240709-imx95_edac-v1-0-3e9c146c1b01@nxp.com --- Frank Li (4): EDAC/fsl_ddr: Pass down fsl_mc_pdata in ddr_in32() and ddr_out32() EDAC/fsl_ddr: Move global variables into struct fsl_mc_pdata dt-bindings: memory: fsl: Add compatible string nxp,imx9-memory-controller arm64: dts: imx93: add ddr edac support Priyanka Singh (1): EDAC/fsl_ddr: Fix bad bit shift operations Ye Li (1): EDAC/fsl_ddr: Add support for i.MX9 DDR controller .../bindings/memory-controllers/fsl/fsl,ddr.yaml | 31 ++++- arch/arm64/boot/dts/freescale/imx93.dtsi | 8 ++ drivers/edac/fsl_ddr_edac.c | 132 ++++++++++++++------- drivers/edac/fsl_ddr_edac.h | 13 ++ drivers/edac/layerscape_edac.c | 1 + 5 files changed, 140 insertions(+), 45 deletions(-) --- base-commit: 0be9f1af39022beac76771eeac08256076f6b221 change-id: 20240704-imx95_edac-209cec208446 Best regards, --- Frank Li <Frank.Li@nxp.com>