| Message ID | 20241023145345.1613824-28-maz@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: Add EL2 support to FEAT_S1PIE/S1POE | expand |
On Wed, Oct 23, 2024 at 03:53:35PM +0100, Marc Zyngier wrote: > POR_EL2 is the equivalent of POR_EL1 for the EL2&0 translation > regime, and it is sorely missing from the sysreg file. > +Sysreg POR_EL2 3 4 10 2 4 > +Fields PIRx_ELx > +EndSysreg We should probably rename the Fields here, though there'd be an awful lot of xs in that name. Still, not an issue for this patch: Reviewed-by: Mark Brown <broonie@kernel.org>
On Wed, 23 Oct 2024 17:13:47 +0100, Mark Brown <broonie@kernel.org> wrote: > > [1 <text/plain; us-ascii (7bit)>] > On Wed, Oct 23, 2024 at 03:53:35PM +0100, Marc Zyngier wrote: > > POR_EL2 is the equivalent of POR_EL1 for the EL2&0 translation > > regime, and it is sorely missing from the sysreg file. > > > +Sysreg POR_EL2 3 4 10 2 4 > > +Fields PIRx_ELx > > +EndSysreg > > We should probably rename the Fields here, though there'd be an awful > lot of xs in that name. If you're in a renaming mood, please start with the TCR2_EL1x brain-damage. Having a way to map an EL12 *accessor* onto the actual register should come at zero cost to the namespace, and the tooling should be augmented to support the way the architecture works. M.
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 8db4431093b26..a33136243bdf2 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2907,6 +2907,10 @@ Sysreg POR_EL1 3 0 10 2 4 Fields PIRx_ELx EndSysreg +Sysreg POR_EL2 3 4 10 2 4 +Fields PIRx_ELx +EndSysreg + Sysreg POR_EL12 3 5 10 2 4 Fields PIRx_ELx EndSysreg
POR_EL2 is the equivalent of POR_EL1 for the EL2&0 translation regime, and it is sorely missing from the sysreg file. Add the sucker. Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/tools/sysreg | 4 ++++ 1 file changed, 4 insertions(+)