| Message ID | 20241029215217.3697-9-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/cdclk: Declutter CDCLK code | expand |
On Tue, 29 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Declutter intel_crtc_compute_min_cdclk() by moving the > crtc_state->dsc.compression_enable check into > intel_vdsc_min_cdclk(). > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index e10378744607..989607c0b35d 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -2812,6 +2812,9 @@ static int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state) > int num_vdsc_instances = intel_dsc_get_num_vdsc_instances(crtc_state); > int min_cdclk = 0; > > + if (!crtc_state->dsc.compression_enable) > + return 0; > + > /* > * When we decide to use only one VDSC engine, since > * each VDSC operates with 1 ppc throughput, pixel clock > @@ -2860,9 +2863,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) > min_cdclk = max(intel_audio_min_cdclk(crtc_state), min_cdclk); > min_cdclk = max(vlv_dsi_min_cdclk(crtc_state), min_cdclk); > min_cdclk = max(intel_planes_min_cdclk(crtc_state), min_cdclk); > - > - if (crtc_state->dsc.compression_enable) > - min_cdclk = max(min_cdclk, intel_vdsc_min_cdclk(crtc_state)); > + min_cdclk = max(min_cdclk, intel_vdsc_min_cdclk(crtc_state)); Was going to say that it would be nice to have the params in the same order... but looks like there's patch later in the series for that. Yay! Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > return min_cdclk; > }
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index e10378744607..989607c0b35d 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2812,6 +2812,9 @@ static int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state) int num_vdsc_instances = intel_dsc_get_num_vdsc_instances(crtc_state); int min_cdclk = 0; + if (!crtc_state->dsc.compression_enable) + return 0; + /* * When we decide to use only one VDSC engine, since * each VDSC operates with 1 ppc throughput, pixel clock @@ -2860,9 +2863,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) min_cdclk = max(intel_audio_min_cdclk(crtc_state), min_cdclk); min_cdclk = max(vlv_dsi_min_cdclk(crtc_state), min_cdclk); min_cdclk = max(intel_planes_min_cdclk(crtc_state), min_cdclk); - - if (crtc_state->dsc.compression_enable) - min_cdclk = max(min_cdclk, intel_vdsc_min_cdclk(crtc_state)); + min_cdclk = max(min_cdclk, intel_vdsc_min_cdclk(crtc_state)); return min_cdclk; }