| Message ID | 20241031070232.1793078-7-masterr3c0rd@epochal.quest (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | sunxi: A100/A133 second stage support | expand |
On Thu, 31 Oct 2024 04:02:19 -0300 Cody Eksal <masterr3c0rd@epochal.quest> wrote: > From: Yangtao Li <frank@allwinnertech.com> > > The Allwinner A100 has two HCI USB controllers, a OTG controller and a > USB PHY. The PHY is compatible with that used by the D1, while the OTG > controller is compatible with the A33. Add nodes for these to the base > DTSI. > > Signed-off-by: Yangtao Li <frank@allwinnertech.com> > [masterr3c0rd@epochal.quest: fallback to a33-musb and d1-usb-phy, edited message] > Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest> Thanks for the changes, looks good to me now. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > --- > Changes in V2: > - Fix sizes of reg definitions in usbphy > - Move #phy-cells to the end of usbphy > - Order nodes by MMIO address > - Remove dr_mode > > .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 91 +++++++++++++++++++ > 1 file changed, 91 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > index adb11b26045f..f6162a107641 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > @@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 { > #thermal-sensor-cells = <1>; > }; > > + usb_otg: usb@5100000 { > + compatible = "allwinner,sun50i-a100-musb", > + "allwinner,sun8i-a33-musb"; > + reg = <0x05100000 0x0400>; > + clocks = <&ccu CLK_BUS_OTG>; > + resets = <&ccu RST_BUS_OTG>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "mc"; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + extcon = <&usbphy 0>; > + status = "disabled"; > + }; > + > + usbphy: phy@5100400 { > + compatible = "allwinner,sun50i-a100-usb-phy", > + "allwinner,sun20i-d1-usb-phy"; > + reg = <0x05100400 0x100>, > + <0x05101800 0x100>, > + <0x05200800 0x100>; > + reg-names = "phy_ctrl", > + "pmu0", > + "pmu1"; > + clocks = <&ccu CLK_USB_PHY0>, > + <&ccu CLK_USB_PHY1>; > + clock-names = "usb0_phy", > + "usb1_phy"; > + resets = <&ccu RST_USB_PHY0>, > + <&ccu RST_USB_PHY1>; > + reset-names = "usb0_reset", > + "usb1_reset"; > + status = "disabled"; > + #phy-cells = <1>; > + }; > + > + ehci0: usb@5101000 { > + compatible = "allwinner,sun50i-a100-ehci", > + "generic-ehci"; > + reg = <0x05101000 0x100>; > + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_BUS_EHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>, > + <&ccu RST_BUS_EHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci0: usb@5101400 { > + compatible = "allwinner,sun50i-a100-ohci", > + "generic-ohci"; > + reg = <0x05101400 0x100>; > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ehci1: usb@5200000 { > + compatible = "allwinner,sun50i-a100-ehci", > + "generic-ehci"; > + reg = <0x05200000 0x100>; > + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI1>, > + <&ccu CLK_BUS_EHCI1>, > + <&ccu CLK_USB_OHCI1>; > + resets = <&ccu RST_BUS_OHCI1>, > + <&ccu RST_BUS_EHCI1>; > + phys = <&usbphy 1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci1: usb@5200400 { > + compatible = "allwinner,sun50i-a100-ohci", > + "generic-ohci"; > + reg = <0x05200400 0x100>; > + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI1>, > + <&ccu CLK_USB_OHCI1>; > + resets = <&ccu RST_BUS_OHCI1>; > + phys = <&usbphy 1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > r_ccu: clock@7010000 { > compatible = "allwinner,sun50i-a100-r-ccu"; > reg = <0x07010000 0x300>;
On 10/31/24 12:32 PM, Cody Eksal wrote: > From: Yangtao Li <frank@allwinnertech.com> > > The Allwinner A100 has two HCI USB controllers, a OTG controller and a > USB PHY. The PHY is compatible with that used by the D1, while the OTG > controller is compatible with the A33. Add nodes for these to the base > DTSI. > > Signed-off-by: Yangtao Li <frank@allwinnertech.com> > [masterr3c0rd@epochal.quest: fallback to a33-musb and d1-usb-phy, edited message] > Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest> Peripheral mode works after disabling ehci0 and ohci0. Otherwise, Tested-by: Parthiban Nallathambi <parthiban@linumiz.com> Thanks, Parthiban > --- > Changes in V2: > - Fix sizes of reg definitions in usbphy > - Move #phy-cells to the end of usbphy > - Order nodes by MMIO address > - Remove dr_mode > > .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 91 +++++++++++++++++++ > 1 file changed, 91 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > index adb11b26045f..f6162a107641 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > @@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 { > #thermal-sensor-cells = <1>; > }; > > + usb_otg: usb@5100000 { > + compatible = "allwinner,sun50i-a100-musb", > + "allwinner,sun8i-a33-musb"; > + reg = <0x05100000 0x0400>; > + clocks = <&ccu CLK_BUS_OTG>; > + resets = <&ccu RST_BUS_OTG>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "mc"; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + extcon = <&usbphy 0>; > + status = "disabled"; > + }; > + > + usbphy: phy@5100400 { > + compatible = "allwinner,sun50i-a100-usb-phy", > + "allwinner,sun20i-d1-usb-phy"; > + reg = <0x05100400 0x100>, > + <0x05101800 0x100>, > + <0x05200800 0x100>; > + reg-names = "phy_ctrl", > + "pmu0", > + "pmu1"; > + clocks = <&ccu CLK_USB_PHY0>, > + <&ccu CLK_USB_PHY1>; > + clock-names = "usb0_phy", > + "usb1_phy"; > + resets = <&ccu RST_USB_PHY0>, > + <&ccu RST_USB_PHY1>; > + reset-names = "usb0_reset", > + "usb1_reset"; > + status = "disabled"; > + #phy-cells = <1>; > + }; > + > + ehci0: usb@5101000 { > + compatible = "allwinner,sun50i-a100-ehci", > + "generic-ehci"; > + reg = <0x05101000 0x100>; > + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_BUS_EHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>, > + <&ccu RST_BUS_EHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci0: usb@5101400 { > + compatible = "allwinner,sun50i-a100-ohci", > + "generic-ohci"; > + reg = <0x05101400 0x100>; > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ehci1: usb@5200000 { > + compatible = "allwinner,sun50i-a100-ehci", > + "generic-ehci"; > + reg = <0x05200000 0x100>; > + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI1>, > + <&ccu CLK_BUS_EHCI1>, > + <&ccu CLK_USB_OHCI1>; > + resets = <&ccu RST_BUS_OHCI1>, > + <&ccu RST_BUS_EHCI1>; > + phys = <&usbphy 1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci1: usb@5200400 { > + compatible = "allwinner,sun50i-a100-ohci", > + "generic-ohci"; > + reg = <0x05200400 0x100>; > + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI1>, > + <&ccu CLK_USB_OHCI1>; > + resets = <&ccu RST_BUS_OHCI1>; > + phys = <&usbphy 1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > r_ccu: clock@7010000 { > compatible = "allwinner,sun50i-a100-r-ccu"; > reg = <0x07010000 0x300>;
On 2024/10/31 4:02 am, Cody Eksal wrote: > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > index adb11b26045f..f6162a107641 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi > @@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 { > #thermal-sensor-cells = <1>; > }; > + > + usb_otg: usb@5100000 { > + compatible = "allwinner,sun50i-a100-musb", > + "allwinner,sun8i-a33-musb"; > + reg = <0x05100000 0x0400>; > + clocks = <&ccu CLK_BUS_OTG>; > + resets = <&ccu RST_BUS_OTG>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "mc"; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + extcon = <&usbphy 0>; > + status = "disabled"; > + }; Quick note: it was determined that if ehci0 and/or ohci0 are enabled, peripheral mode does not function correctly. From my understanding, it is an unrelated issue in musb that causes this; the PHY gets claimed by the HCI nodes before MUSB, and due to some other issue, the PHY doesn't get properly rerouted to MUSB. With those nodes disabled, attaching gadgets to MUSB works correctly, and with them enabled, host mode works properly. - Cody > + usbphy: phy@5100400 { > + compatible = "allwinner,sun50i-a100-usb-phy", > + "allwinner,sun20i-d1-usb-phy"; > + reg = <0x05100400 0x100>, > + <0x05101800 0x100>, > + <0x05200800 0x100>; > + reg-names = "phy_ctrl", > + "pmu0", > + "pmu1"; > + clocks = <&ccu CLK_USB_PHY0>, > + <&ccu CLK_USB_PHY1>; > + clock-names = "usb0_phy", > + "usb1_phy"; > + resets = <&ccu RST_USB_PHY0>, > + <&ccu RST_USB_PHY1>; > + reset-names = "usb0_reset", > + "usb1_reset"; > + status = "disabled"; > + #phy-cells = <1>; > + }; > + > + ehci0: usb@5101000 { > + compatible = "allwinner,sun50i-a100-ehci", > + "generic-ehci"; > + reg = <0x05101000 0x100>; > + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_BUS_EHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>, > + <&ccu RST_BUS_EHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci0: usb@5101400 { > + compatible = "allwinner,sun50i-a100-ohci", > + "generic-ohci"; > + reg = <0x05101400 0x100>; > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + };
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index adb11b26045f..f6162a107641 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 { #thermal-sensor-cells = <1>; }; + usb_otg: usb@5100000 { + compatible = "allwinner,sun50i-a100-musb", + "allwinner,sun8i-a33-musb"; + reg = <0x05100000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@5100400 { + compatible = "allwinner,sun50i-a100-usb-phy", + "allwinner,sun20i-d1-usb-phy"; + reg = <0x05100400 0x100>, + <0x05101800 0x100>, + <0x05200800 0x100>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1"; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci0: usb@5101000 { + compatible = "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg = <0x05101000 0x100>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@5101400 { + compatible = "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg = <0x05101400 0x100>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@5200000 { + compatible = "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg = <0x05200000 0x100>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@5200400 { + compatible = "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg = <0x05200400 0x100>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + r_ccu: clock@7010000 { compatible = "allwinner,sun50i-a100-r-ccu"; reg = <0x07010000 0x300>;