diff mbox series

[v2,3/5] drm/i915/dp_mst: Add a way to disable the DP2 config

Message ID 20241030192313.4030617-4-imre.deak@intel.com (mailing list archive)
State New
Headers show
Series drm/dp_mst: Fix DDI function/DP2 config programming | expand

Commit Message

Imre Deak Oct. 30, 2024, 7:23 p.m. UTC
Add a way to disable the DP2 configuration, required by the next patch
during transcoder disabling.

While at it drop the redundant encoder parameter.

v2:
- Keep intel_ddi_config_transcoder_dp2() static. (Jani)
- Remove the encoder parameter.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

Comments

Luca Coelho Oct. 31, 2024, 10:52 a.m. UTC | #1
On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> Add a way to disable the DP2 configuration, required by the next patch
> during transcoder disabling.
> 
> While at it drop the redundant encoder parameter.
> 
> v2:
> - Keep intel_ddi_config_transcoder_dp2() static. (Jani)
> - Remove the encoder parameter.
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---

LGTM.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.
Jani Nikula Oct. 31, 2024, 12:36 p.m. UTC | #2
On Wed, 30 Oct 2024, Imre Deak <imre.deak@intel.com> wrote:
> Add a way to disable the DP2 configuration, required by the next patch
> during transcoder disabling.
>
> While at it drop the redundant encoder parameter.
>
> v2:
> - Keep intel_ddi_config_transcoder_dp2() static. (Jani)
> - Remove the encoder parameter.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 069cca4b38b2e..dcd43087fa7ed 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -455,14 +455,18 @@ static u32 bdw_trans_port_sync_master_select(enum transcoder master_transcoder)
>  }
>  
>  static void
> -intel_ddi_config_transcoder_dp2(struct intel_encoder *encoder,
> -				const struct intel_crtc_state *crtc_state)
> +intel_ddi_config_transcoder_dp2(const struct intel_crtc_state *crtc_state,
> +				bool enable)
>  {
> -	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	struct drm_i915_private *i915 = to_i915(display->drm);

You don't need i915 for anything here, might as well change them all.

BR,
Jani.

>  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>  	u32 val = 0;
>  
> -	if (intel_dp_is_uhbr(crtc_state))
> +	if (!HAS_DP20(i915))
> +		return;
> +
> +	if (enable && intel_dp_is_uhbr(crtc_state))
>  		val = TRANS_DP2_128B132B_CHANNEL_CODING;
>  
>  	intel_de_write(i915, TRANS_DP2_CTL(cpu_transcoder), val);
> @@ -2549,7 +2553,7 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	/*
>  	 * 6.b If DP v2.0/128b mode - Configure TRANS_DP2_CTL register settings.
>  	 */
> -	intel_ddi_config_transcoder_dp2(encoder, crtc_state);
> +	intel_ddi_config_transcoder_dp2(crtc_state, true);
>  
>  	/*
>  	 * 6.c Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST
> @@ -2686,8 +2690,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	 */
>  	intel_ddi_enable_transcoder_clock(encoder, crtc_state);
>  
> -	if (HAS_DP20(dev_priv))
> -		intel_ddi_config_transcoder_dp2(encoder, crtc_state);
> +	intel_ddi_config_transcoder_dp2(crtc_state, true);
>  
>  	/*
>  	 * 7.b Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST
Imre Deak Oct. 31, 2024, 12:42 p.m. UTC | #3
On Thu, Oct 31, 2024 at 02:36:37PM +0200, Jani Nikula wrote:
> On Wed, 30 Oct 2024, Imre Deak <imre.deak@intel.com> wrote:
> > Add a way to disable the DP2 configuration, required by the next patch
> > during transcoder disabling.
> >
> > While at it drop the redundant encoder parameter.
> >
> > v2:
> > - Keep intel_ddi_config_transcoder_dp2() static. (Jani)
> > - Remove the encoder parameter.
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++++-------
> >  1 file changed, 10 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 069cca4b38b2e..dcd43087fa7ed 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -455,14 +455,18 @@ static u32 bdw_trans_port_sync_master_select(enum transcoder master_transcoder)
> >  }
> >  
> >  static void
> > -intel_ddi_config_transcoder_dp2(struct intel_encoder *encoder,
> > -				const struct intel_crtc_state *crtc_state)
> > +intel_ddi_config_transcoder_dp2(const struct intel_crtc_state *crtc_state,
> > +				bool enable)
> >  {
> > -	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> > +	struct intel_display *display = to_intel_display(crtc_state);
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> 
> You don't need i915 for anything here, might as well change them all.

HAS_DP20() still needs it.

> BR,
> Jani.
> 
> >  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> >  	u32 val = 0;
> >  
> > -	if (intel_dp_is_uhbr(crtc_state))
> > +	if (!HAS_DP20(i915))
> > +		return;
> > +
> > +	if (enable && intel_dp_is_uhbr(crtc_state))
> >  		val = TRANS_DP2_128B132B_CHANNEL_CODING;
> >  
> >  	intel_de_write(i915, TRANS_DP2_CTL(cpu_transcoder), val);
> > @@ -2549,7 +2553,7 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> >  	/*
> >  	 * 6.b If DP v2.0/128b mode - Configure TRANS_DP2_CTL register settings.
> >  	 */
> > -	intel_ddi_config_transcoder_dp2(encoder, crtc_state);
> > +	intel_ddi_config_transcoder_dp2(crtc_state, true);
> >  
> >  	/*
> >  	 * 6.c Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST
> > @@ -2686,8 +2690,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> >  	 */
> >  	intel_ddi_enable_transcoder_clock(encoder, crtc_state);
> >  
> > -	if (HAS_DP20(dev_priv))
> > -		intel_ddi_config_transcoder_dp2(encoder, crtc_state);
> > +	intel_ddi_config_transcoder_dp2(crtc_state, true);
> >  
> >  	/*
> >  	 * 7.b Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST
> 
> -- 
> Jani Nikula, Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 069cca4b38b2e..dcd43087fa7ed 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -455,14 +455,18 @@  static u32 bdw_trans_port_sync_master_select(enum transcoder master_transcoder)
 }
 
 static void
-intel_ddi_config_transcoder_dp2(struct intel_encoder *encoder,
-				const struct intel_crtc_state *crtc_state)
+intel_ddi_config_transcoder_dp2(const struct intel_crtc_state *crtc_state,
+				bool enable)
 {
-	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	struct intel_display *display = to_intel_display(crtc_state);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	u32 val = 0;
 
-	if (intel_dp_is_uhbr(crtc_state))
+	if (!HAS_DP20(i915))
+		return;
+
+	if (enable && intel_dp_is_uhbr(crtc_state))
 		val = TRANS_DP2_128B132B_CHANNEL_CODING;
 
 	intel_de_write(i915, TRANS_DP2_CTL(cpu_transcoder), val);
@@ -2549,7 +2553,7 @@  static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	/*
 	 * 6.b If DP v2.0/128b mode - Configure TRANS_DP2_CTL register settings.
 	 */
-	intel_ddi_config_transcoder_dp2(encoder, crtc_state);
+	intel_ddi_config_transcoder_dp2(crtc_state, true);
 
 	/*
 	 * 6.c Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST
@@ -2686,8 +2690,7 @@  static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	 */
 	intel_ddi_enable_transcoder_clock(encoder, crtc_state);
 
-	if (HAS_DP20(dev_priv))
-		intel_ddi_config_transcoder_dp2(encoder, crtc_state);
+	intel_ddi_config_transcoder_dp2(crtc_state, true);
 
 	/*
 	 * 7.b Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST