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KVM: x86: Document an erratum in KVM_SET_VCPU_EVENTS on Intel CPUs

Message ID 20240802200420.330769-1-seanjc@google.com (mailing list archive)
State New, archived
Headers show
Series KVM: x86: Document an erratum in KVM_SET_VCPU_EVENTS on Intel CPUs | expand

Commit Message

Sean Christopherson Aug. 2, 2024, 8:04 p.m. UTC
Document a flaw in KVM's ABI which lets userspace attempt to inject a
"bad" hardware exception event, and thus induce VM-Fail on Intel CPUs.
Fixing the flaw is a fool's errand, as AMD doesn't sanity check the
validity of the error code, Intel CPUs that support CET relax the check
for Protected Mode, userspace can change the mode after queueing an
exception, KVM ignores the error code when emulating Real Mode exceptions,
and so on and so forth.

The VM-Fail itself doesn't harm KVM or the kernel beyond triggering a
ratelimited pr_warn(), so just document the oddity.

Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 Documentation/virt/kvm/x86/errata.rst | 12 ++++++++++++
 1 file changed, 12 insertions(+)


base-commit: 332d2c1d713e232e163386c35a3ba0c1b90df83f

Comments

Sean Christopherson Oct. 31, 2024, 7:51 p.m. UTC | #1
On Fri, 02 Aug 2024 13:04:20 -0700, Sean Christopherson wrote:
> Document a flaw in KVM's ABI which lets userspace attempt to inject a
> "bad" hardware exception event, and thus induce VM-Fail on Intel CPUs.
> Fixing the flaw is a fool's errand, as AMD doesn't sanity check the
> validity of the error code, Intel CPUs that support CET relax the check
> for Protected Mode, userspace can change the mode after queueing an
> exception, KVM ignores the error code when emulating Real Mode exceptions,
> and so on and so forth.
> 
> [...]

Applied to kvm-x86 misc, thanks!

[1/1] KVM: x86: Document an erratum in KVM_SET_VCPU_EVENTS on Intel CPUs
      https://github.com/kvm-x86/linux/commit/eebc1cfae6c9

--
https://github.com/kvm-x86/linux/tree/next
Sean Christopherson Nov. 1, 2024, 7:24 p.m. UTC | #2
On Thu, Oct 31, 2024, Sean Christopherson wrote:
> On Fri, 02 Aug 2024 13:04:20 -0700, Sean Christopherson wrote:
> > Document a flaw in KVM's ABI which lets userspace attempt to inject a
> > "bad" hardware exception event, and thus induce VM-Fail on Intel CPUs.
> > Fixing the flaw is a fool's errand, as AMD doesn't sanity check the
> > validity of the error code, Intel CPUs that support CET relax the check
> > for Protected Mode, userspace can change the mode after queueing an
> > exception, KVM ignores the error code when emulating Real Mode exceptions,
> > and so on and so forth.
> > 
> > [...]
> 
> Applied to kvm-x86 misc, thanks!
> 
> [1/1] KVM: x86: Document an erratum in KVM_SET_VCPU_EVENTS on Intel CPUs
>       https://github.com/kvm-x86/linux/commit/eebc1cfae6c9

FYI, I rebased misc to v6.12-rc5, as patches in another series had already been
taken through the tip tree.  New hash:

[1/1] KVM: x86: Document an erratum in KVM_SET_VCPU_EVENTS on Intel CPUs
      https://github.com/kvm-x86/linux/commit/0e3b70aa137c
diff mbox series

Patch

diff --git a/Documentation/virt/kvm/x86/errata.rst b/Documentation/virt/kvm/x86/errata.rst
index 4116045a8744..37c79362a48f 100644
--- a/Documentation/virt/kvm/x86/errata.rst
+++ b/Documentation/virt/kvm/x86/errata.rst
@@ -33,6 +33,18 @@  Note however that any software (e.g ``WIN87EM.DLL``) expecting these features
 to be present likely predates these CPUID feature bits, and therefore
 doesn't know to check for them anyway.
 
+``KVM_SET_VCPU_EVENTS`` issue
+-----------------------------
+
+Invalid KVM_SET_VCPU_EVENTS input with respect to error codes *may* result in
+failed VM-Entry on Intel CPUs.  Pre-CET Intel CPUs require that exception
+injection through the VMCS correctly set the "error code valid" flag, e.g.
+require the flag be set when injecting a #GP, clear when injecting a #UD,
+clear when injecting a soft exception, etc.  Intel CPUs that enumerate
+IA32_VMX_BASIC[56] as '1' relax VMX's consistency checks, and AMD CPUs have no
+restrictions whatsoever.  KVM_SET_VCPU_EVENTS doesn't sanity check the vector
+versus "has_error_code", i.e. KVM's ABI follows AMD behavior.
+
 Nested virtualization features
 ------------------------------