| Message ID | 20241029091729.3317512-3-jamin_lin@aspeedtech.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Support RTC for AST2700 | expand |
On 10/29/24 10:17, Jamin Lin wrote: > Fix coding style issues from checkpatch.pl > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Thanks, C. > --- > hw/timer/aspeed_timer.c | 13 ++++++++----- > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c > index b1f860ecfb..5af268ea9e 100644 > --- a/hw/timer/aspeed_timer.c > +++ b/hw/timer/aspeed_timer.c > @@ -276,7 +276,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg, > old_reload = t->reload; > t->reload = calculate_min_ticks(t, value); > > - /* If the reload value was not previously set, or zero, and > + /* > + * If the reload value was not previously set, or zero, and > * the current value is valid, try to start the timer if it is > * enabled. > */ > @@ -312,7 +313,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg, > } > } > > -/* Control register operations are broken out into helpers that can be > +/* > + * Control register operations are broken out into helpers that can be > * explicitly called on aspeed_timer_reset(), but also from > * aspeed_timer_ctrl_op(). > */ > @@ -396,7 +398,8 @@ static void aspeed_timer_set_ctrl(AspeedTimerCtrlState *s, uint32_t reg) > AspeedTimer *t; > const uint8_t enable_mask = BIT(op_enable); > > - /* Handle a dependency between the 'enable' and remaining three > + /* > + * Handle a dependency between the 'enable' and remaining three > * configuration bits - i.e. if more than one bit in the control set has > * changed, including the 'enable' bit, then we want either disable the > * timer and perform configuration, or perform configuration and then > @@ -582,7 +585,6 @@ static void aspeed_2600_timer_write(AspeedTimerCtrlState *s, hwaddr offset, > case 0x3C: > aspeed_timer_set_ctrl(s, s->ctrl & ~tv); > break; > - > case 0x38: > default: > qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n", > @@ -623,7 +625,8 @@ static void aspeed_timer_reset(DeviceState *dev) > > for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { > AspeedTimer *t = &s->timers[i]; > - /* Explicitly call helpers to avoid any conditional behaviour through > + /* > + * Explicitly call helpers to avoid any conditional behaviour through > * aspeed_timer_set_ctrl(). > */ > aspeed_timer_ctrl_enable(t, false);
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index b1f860ecfb..5af268ea9e 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -276,7 +276,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg, old_reload = t->reload; t->reload = calculate_min_ticks(t, value); - /* If the reload value was not previously set, or zero, and + /* + * If the reload value was not previously set, or zero, and * the current value is valid, try to start the timer if it is * enabled. */ @@ -312,7 +313,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg, } } -/* Control register operations are broken out into helpers that can be +/* + * Control register operations are broken out into helpers that can be * explicitly called on aspeed_timer_reset(), but also from * aspeed_timer_ctrl_op(). */ @@ -396,7 +398,8 @@ static void aspeed_timer_set_ctrl(AspeedTimerCtrlState *s, uint32_t reg) AspeedTimer *t; const uint8_t enable_mask = BIT(op_enable); - /* Handle a dependency between the 'enable' and remaining three + /* + * Handle a dependency between the 'enable' and remaining three * configuration bits - i.e. if more than one bit in the control set has * changed, including the 'enable' bit, then we want either disable the * timer and perform configuration, or perform configuration and then @@ -582,7 +585,6 @@ static void aspeed_2600_timer_write(AspeedTimerCtrlState *s, hwaddr offset, case 0x3C: aspeed_timer_set_ctrl(s, s->ctrl & ~tv); break; - case 0x38: default: qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n", @@ -623,7 +625,8 @@ static void aspeed_timer_reset(DeviceState *dev) for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { AspeedTimer *t = &s->timers[i]; - /* Explicitly call helpers to avoid any conditional behaviour through + /* + * Explicitly call helpers to avoid any conditional behaviour through * aspeed_timer_set_ctrl(). */ aspeed_timer_ctrl_enable(t, false);
Fix coding style issues from checkpatch.pl Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> --- hw/timer/aspeed_timer.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-)