[v3,0/2] mmc: host: sdhci-esdhc-imx: implement emmc hardware reset

Message

Josua Mayer Nov. 1, 2024, 11:42 a.m. UTC

Signed-off-by: Josua Mayer <[e-mail]>
---
Changes in v3:
- reused existing control register definition from sdhci-esdhc.h
  (Reported-by: Bough Chen <[e-mail]>)
- placed both control register mask definitions next to each other
- fixed timeout write register name
- Link to v2: https://lore.kernel.org/r/[e-mail]

Changes in v2:
- replaced udelay with usleep_range
  (Reported-by: Adrian Hunter <[e-mail]>)
- added comments for delay values
  (Reported-by: Peng Fan <[e-mail]>)
- delay values based on JEDEC Standard No. 84-B51, 6.15.10 H/W Reset Operation,
  on page 159
  (Thanks to Bough Chen <[e-mail]>)
- added a second patch demonstrating a cosmetic issue revealed by first
  patch - it bothered me during development but is not important
- Link to v1: https://lore.kernel.org/r/[e-mail]

---
Josua Mayer (2):
      mmc: host: sdhci-esdhc-imx: implement emmc hardware reset
      mmc: host: sdhci-esdhc-imx: update esdhc sysctl dtocv bitmask

 drivers/mmc/host/sdhci-esdhc-imx.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)
---
base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc
change-id: 20241027-imx-emmc-reset-7127d311174c

Best regards,

Comments

Adrian Hunter Nov. 4, 2024, 6:38 a.m. UTC | #1

On 1/11/24 13:42, Josua Mayer wrote:
> Signed-off-by: Josua Mayer <[e-mail]>
> ---
> Changes in v3:
> - reused existing control register definition from sdhci-esdhc.h
>   (Reported-by: Bough Chen <[e-mail]>)
> - placed both control register mask definitions next to each other
> - fixed timeout write register name
> - Link to v2: https://lore.kernel.org/r/[e-mail]
> 
> Changes in v2:
> - replaced udelay with usleep_range
>   (Reported-by: Adrian Hunter <[e-mail]>)
> - added comments for delay values
>   (Reported-by: Peng Fan <[e-mail]>)
> - delay values based on JEDEC Standard No. 84-B51, 6.15.10 H/W Reset Operation,
>   on page 159
>   (Thanks to Bough Chen <[e-mail]>)
> - added a second patch demonstrating a cosmetic issue revealed by first
>   patch - it bothered me during development but is not important
> - Link to v1: https://lore.kernel.org/r/[e-mail]
> 
> ---
> Josua Mayer (2):
>       mmc: host: sdhci-esdhc-imx: implement emmc hardware reset
>       mmc: host: sdhci-esdhc-imx: update esdhc sysctl dtocv bitmask

For both:

Acked-by: Adrian Hunter <[e-mail]>

Ulf Hansson Nov. 12, 2024, 6:43 p.m. UTC | #2

On Fri, 1 Nov 2024 at 12:42, Josua Mayer <[e-mail]> wrote:
>
> Signed-off-by: Josua Mayer <[e-mail]>
> ---
> Changes in v3:
> - reused existing control register definition from sdhci-esdhc.h
>   (Reported-by: Bough Chen <[e-mail]>)
> - placed both control register mask definitions next to each other
> - fixed timeout write register name
> - Link to v2: https://lore.kernel.org/r/[e-mail]
>
> Changes in v2:
> - replaced udelay with usleep_range
>   (Reported-by: Adrian Hunter <[e-mail]>)
> - added comments for delay values
>   (Reported-by: Peng Fan <[e-mail]>)
> - delay values based on JEDEC Standard No. 84-B51, 6.15.10 H/W Reset Operation,
>   on page 159
>   (Thanks to Bough Chen <[e-mail]>)
> - added a second patch demonstrating a cosmetic issue revealed by first
>   patch - it bothered me during development but is not important
> - Link to v1: https://lore.kernel.org/r/[e-mail]
>
> ---
> Josua Mayer (2):
>       mmc: host: sdhci-esdhc-imx: implement emmc hardware reset
>       mmc: host: sdhci-esdhc-imx: update esdhc sysctl dtocv bitmask
>
>  drivers/mmc/host/sdhci-esdhc-imx.c | 19 ++++++++++++++++---
>  1 file changed, 16 insertions(+), 3 deletions(-)


The series applied for next, thanks!

Kind regards
Uffe