| Message ID | 20241101070610.1267391-9-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | A bunch of changes to refine i.MX PCIe driver | expand |
Hi Richard, kernel test robot noticed the following build errors: [auto build test ERROR on pci/next] [also build test ERROR on pci/for-linus shawnguo/for-next mani-mhi/mhi-next linus/master v6.12-rc6 next-20241104] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Richard-Zhu/dt-bindings-imx6q-pcie-Add-ref-clock-for-i-MX95-PCIe-RC/20241101-150006 base: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next patch link: https://lore.kernel.org/r/20241101070610.1267391-9-hongxing.zhu%40nxp.com patch subject: [PATCH v6 08/10] PCI: imx6: Use dwc common suspend resume method config: i386-buildonly-randconfig-004-20241104 (https://download.01.org/0day-ci/archive/20241104/202411042110.bIIyBWlv-lkp@intel.com/config) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241104/202411042110.bIIyBWlv-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411042110.bIIyBWlv-lkp@intel.com/ All errors (new ones prefixed by >>): ld: drivers/pci/controller/dwc/pci-imx6.o: in function `imx_pcie_resume_noirq': >> pci-imx6.c:(.text+0x88): undefined reference to `dw_pcie_resume_noirq' ld: drivers/pci/controller/dwc/pci-imx6.o: in function `imx_pcie_suspend_noirq': >> pci-imx6.c:(.text+0x111): undefined reference to `dw_pcie_suspend_noirq' ld: drivers/usb/misc/onboard_usb_dev.o: in function `onboard_dev_probe': onboard_usb_dev.c:(.text+0x6ae): undefined reference to `i2c_find_device_by_fwnode' ld: onboard_usb_dev.c:(.text+0x711): undefined reference to `i2c_smbus_write_block_data' ld: onboard_usb_dev.c:(.text+0x72f): undefined reference to `i2c_smbus_write_word_data' ld: onboard_usb_dev.c:(.text+0x74c): undefined reference to `i2c_smbus_write_word_data' Kconfig warnings: (for reference only) WARNING: unmet direct dependencies detected for MODVERSIONS Depends on [n]: MODULES [=y] && !COMPILE_TEST [=y] Selected by [y]: - RANDSTRUCT_PERFORMANCE [=y] && GCC_PLUGINS [=y] && MODULES [=y] WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n] Selected by [m]: - DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=m] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
On Fri, Nov 01, 2024 at 03:06:08PM +0800, Richard Zhu wrote: > From: Frank Li <Frank.Li@nxp.com> > > Call common dwc suspend/resume function. Use dwc common iATU method to > send out PME_TURN_OFF message. In Old DWC implementations, > PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 register is reserved. So the > generic DWC implementation of sending the PME_Turn_Off message using a > dummy MMIO write cannot be used. Use previouse method to kick off > PME_TURN_OFF MSG for these platforms. > > Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by > dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq(). > > Since dw_pcie_suspend_noirq() already does these, see below call stack: > dw_pcie_suspend_noirq() > dw_pcie_stop_link(); > imx_pcie_stop_link(); > pci->pp.ops->deinit(); > imx_pcie_host_exit(); > > Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and > imx_pcie_start_link() by dw_pcie_resume_noirq() in > imx_pcie_resume_noirq(). > > Since dw_pcie_resume_noirq() already does these, see below call stack: > dw_pcie_resume_noirq() > pci->pp.ops->init(); > imx_pcie_host_init(); > dw_pcie_setup_rc(); > dw_pcie_start_link(); > imx_pcie_start_link(); > Are these two changes (dw_pcie_suspend_noirq(), dw_pcie_resume_noirq()) related to this patch? If not, these should be in a separate patch. > Signed-off-by: Frank Li <Frank.Li@nxp.com> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 95 ++++++++++----------------- > 1 file changed, 34 insertions(+), 61 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index fde2f4eaf804..3c074cc2605f 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -33,6 +33,7 @@ > #include <linux/pm_domain.h> > #include <linux/pm_runtime.h> > > +#include "../../pci.h" > #include "pcie-designware.h" > > #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) > @@ -108,19 +109,18 @@ struct imx_pcie_drvdata { > int (*init_phy)(struct imx_pcie *pcie); > int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable); > int (*core_reset)(struct imx_pcie *pcie, bool assert); > + const struct dw_pcie_host_ops *ops; > }; > > struct imx_pcie { > struct dw_pcie *pci; > struct gpio_desc *reset_gpiod; > - bool link_is_up; > struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS]; > struct regmap *iomuxc_gpr; > u16 msi_ctrl; > u32 controller_id; > struct reset_control *pciephy_reset; > struct reset_control *apps_reset; > - struct reset_control *turnoff_reset; > u32 tx_deemph_gen1; > u32 tx_deemph_gen2_3p5db; > u32 tx_deemph_gen2_6db; > @@ -899,13 +899,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci) > dev_info(dev, "Link: Only Gen1 is enabled\n"); > } > > - imx_pcie->link_is_up = true; > tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); > dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); > return 0; > > err_reset_phy: > - imx_pcie->link_is_up = false; > dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n", > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); > @@ -1024,9 +1022,32 @@ static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr) > return cpu_addr - entry->offset; > } > > +/* > + * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 > + * register is reserved. So the generic DWC implementation of sending the > + * PME_Turn_Off message using a dummy MMIO write cannot be used. > + */ > +static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp) > +{ > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > + struct imx_pcie *imx_pcie = to_imx_pcie(pci); > + > + regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); > + regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); > + > + usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US); > +} > + > + Stray newline. > static const struct dw_pcie_host_ops imx_pcie_host_ops = { > .init = imx_pcie_host_init, > .deinit = imx_pcie_host_exit, > + .pme_turn_off = imx_pcie_pme_turn_off, > +}; > + > +static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = { > + .init = imx_pcie_host_init, > + .deinit = imx_pcie_host_exit, > }; > > static const struct dw_pcie_ops dw_pcie_ops = { > @@ -1147,43 +1168,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, > return 0; > } > > -static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie) > -{ > - struct device *dev = imx_pcie->pci->dev; > - > - /* Some variants have a turnoff reset in DT */ > - if (imx_pcie->turnoff_reset) { > - reset_control_assert(imx_pcie->turnoff_reset); > - reset_control_deassert(imx_pcie->turnoff_reset); Where these are handled in imx_pcie_pme_turn_off()? If you removed them intentionally for a reason, it should be mentioned in commit message. > - goto pm_turnoff_sleep; > - } > - > - /* Others poke directly at IOMUXC registers */ > - switch (imx_pcie->drvdata->variant) { > - case IMX6SX: > - case IMX6QP: > - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > - IMX6SX_GPR12_PCIE_PM_TURN_OFF, > - IMX6SX_GPR12_PCIE_PM_TURN_OFF); > - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > - IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0); > - break; > - default: > - dev_err(dev, "PME_Turn_Off not implemented\n"); > - return; > - } > - > - /* > - * Components with an upstream port must respond to > - * PME_Turn_Off with PME_TO_Ack but we can't check. > - * > - * The standard recommends a 1-10ms timeout after which to > - * proceed anyway as if acks were received. > - */ > -pm_turnoff_sleep: > - usleep_range(1000, 10000); > -} > - > static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) > { > u8 offset; > @@ -1207,36 +1191,26 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) [...] > @@ -1267,11 +1241,14 @@ static int imx_pcie_probe(struct platform_device *pdev) > > pci->dev = dev; > pci->ops = &dw_pcie_ops; > - pci->pp.ops = &imx_pcie_host_ops; > > imx_pcie->pci = pci; > imx_pcie->drvdata = of_device_get_match_data(dev); > > + pci->pp.ops = &imx_pcie_host_dw_pme_ops; > + if (imx_pcie->drvdata->ops) > + pci->pp.ops = imx_pcie->drvdata->ops; Use if..else pattern > + > /* Find the PHY if one is defined, only imx7d uses it */ > np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); > if (np) { > @@ -1343,13 +1320,6 @@ static int imx_pcie_probe(struct platform_device *pdev) > break; > } > > - /* Grab turnoff reset */ > - imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); > - if (IS_ERR(imx_pcie->turnoff_reset)) { > - dev_err(dev, "Failed to get TURNOFF reset control\n"); > - return PTR_ERR(imx_pcie->turnoff_reset); > - } > - Same here. Reason not explained. - Mani
On Fri, Nov 15, 2024 at 12:39:32PM +0530, Manivannan Sadhasivam wrote: > On Fri, Nov 01, 2024 at 03:06:08PM +0800, Richard Zhu wrote: > > From: Frank Li <Frank.Li@nxp.com> > > > > Call common dwc suspend/resume function. Use dwc common iATU method to > > send out PME_TURN_OFF message. In Old DWC implementations, > > PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 register is reserved. So the > > generic DWC implementation of sending the PME_Turn_Off message using a > > dummy MMIO write cannot be used. Use previouse method to kick off > > PME_TURN_OFF MSG for these platforms. > > > > Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by > > dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq(). > > > > Since dw_pcie_suspend_noirq() already does these, see below call stack: > > dw_pcie_suspend_noirq() > > dw_pcie_stop_link(); > > imx_pcie_stop_link(); > > pci->pp.ops->deinit(); > > imx_pcie_host_exit(); > > > > Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and > > imx_pcie_start_link() by dw_pcie_resume_noirq() in > > imx_pcie_resume_noirq(). > > > > Since dw_pcie_resume_noirq() already does these, see below call stack: > > dw_pcie_resume_noirq() > > pci->pp.ops->init(); > > imx_pcie_host_init(); > > dw_pcie_setup_rc(); > > dw_pcie_start_link(); > > imx_pcie_start_link(); > > > > Are these two changes (dw_pcie_suspend_noirq(), dw_pcie_resume_noirq()) related > to this patch? If not, these should be in a separate patch. Sorry, this patch have not touch dw_pcie_suspend_noirq() and dw_pcie_resume_noirq()'s implement, just call it. I have not understood what's your means. > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > --- > > drivers/pci/controller/dwc/pci-imx6.c | 95 ++++++++++----------------- > > 1 file changed, 34 insertions(+), 61 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > > index fde2f4eaf804..3c074cc2605f 100644 > > --- a/drivers/pci/controller/dwc/pci-imx6.c > > +++ b/drivers/pci/controller/dwc/pci-imx6.c > > @@ -33,6 +33,7 @@ > > #include <linux/pm_domain.h> > > #include <linux/pm_runtime.h> > > > > +#include "../../pci.h" > > #include "pcie-designware.h" > > > > #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) > > @@ -108,19 +109,18 @@ struct imx_pcie_drvdata { > > int (*init_phy)(struct imx_pcie *pcie); > > int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable); > > int (*core_reset)(struct imx_pcie *pcie, bool assert); > > + const struct dw_pcie_host_ops *ops; > > }; > > > > struct imx_pcie { > > struct dw_pcie *pci; > > struct gpio_desc *reset_gpiod; > > - bool link_is_up; > > struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS]; > > struct regmap *iomuxc_gpr; > > u16 msi_ctrl; > > u32 controller_id; > > struct reset_control *pciephy_reset; > > struct reset_control *apps_reset; > > - struct reset_control *turnoff_reset; > > u32 tx_deemph_gen1; > > u32 tx_deemph_gen2_3p5db; > > u32 tx_deemph_gen2_6db; > > @@ -899,13 +899,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci) > > dev_info(dev, "Link: Only Gen1 is enabled\n"); > > } > > > > - imx_pcie->link_is_up = true; > > tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); > > dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); > > return 0; > > > > err_reset_phy: > > - imx_pcie->link_is_up = false; > > dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n", > > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), > > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); > > @@ -1024,9 +1022,32 @@ static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr) > > return cpu_addr - entry->offset; > > } > > > > +/* > > + * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 > > + * register is reserved. So the generic DWC implementation of sending the > > + * PME_Turn_Off message using a dummy MMIO write cannot be used. > > + */ > > +static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp) > > +{ > > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > > + struct imx_pcie *imx_pcie = to_imx_pcie(pci); > > + > > + regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); > > + regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); > > + > > + usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US); > > +} > > + > > + > > Stray newline. > > > static const struct dw_pcie_host_ops imx_pcie_host_ops = { > > .init = imx_pcie_host_init, > > .deinit = imx_pcie_host_exit, > > + .pme_turn_off = imx_pcie_pme_turn_off, > > +}; > > + > > +static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = { > > + .init = imx_pcie_host_init, > > + .deinit = imx_pcie_host_exit, > > }; > > > > static const struct dw_pcie_ops dw_pcie_ops = { > > @@ -1147,43 +1168,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, > > return 0; > > } > > > > -static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie) > > -{ > > - struct device *dev = imx_pcie->pci->dev; > > - > > - /* Some variants have a turnoff reset in DT */ > > - if (imx_pcie->turnoff_reset) { > > - reset_control_assert(imx_pcie->turnoff_reset); > > - reset_control_deassert(imx_pcie->turnoff_reset); > > Where these are handled in imx_pcie_pme_turn_off()? If you removed them > intentionally for a reason, it should be mentioned in commit message. > > > - goto pm_turnoff_sleep; > > - } > > - > > - /* Others poke directly at IOMUXC registers */ > > - switch (imx_pcie->drvdata->variant) { > > - case IMX6SX: > > - case IMX6QP: > > - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > > - IMX6SX_GPR12_PCIE_PM_TURN_OFF, > > - IMX6SX_GPR12_PCIE_PM_TURN_OFF); > > - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > > - IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0); > > - break; > > - default: > > - dev_err(dev, "PME_Turn_Off not implemented\n"); > > - return; > > - } > > - > > - /* > > - * Components with an upstream port must respond to > > - * PME_Turn_Off with PME_TO_Ack but we can't check. > > - * > > - * The standard recommends a 1-10ms timeout after which to > > - * proceed anyway as if acks were received. > > - */ > > -pm_turnoff_sleep: > > - usleep_range(1000, 10000); > > -} > > - > > static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) > > { > > u8 offset; > > @@ -1207,36 +1191,26 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) > > [...] > > > @@ -1267,11 +1241,14 @@ static int imx_pcie_probe(struct platform_device *pdev) > > > > pci->dev = dev; > > pci->ops = &dw_pcie_ops; > > - pci->pp.ops = &imx_pcie_host_ops; > > > > imx_pcie->pci = pci; > > imx_pcie->drvdata = of_device_get_match_data(dev); > > > > + pci->pp.ops = &imx_pcie_host_dw_pme_ops; > > + if (imx_pcie->drvdata->ops) > > + pci->pp.ops = imx_pcie->drvdata->ops; > > Use if..else pattern > > > + > > /* Find the PHY if one is defined, only imx7d uses it */ > > np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); > > if (np) { > > @@ -1343,13 +1320,6 @@ static int imx_pcie_probe(struct platform_device *pdev) > > break; > > } > > > > - /* Grab turnoff reset */ > > - imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); > > - if (IS_ERR(imx_pcie->turnoff_reset)) { > > - dev_err(dev, "Failed to get TURNOFF reset control\n"); > > - return PTR_ERR(imx_pcie->turnoff_reset); > > - } > > - > > Same here. Reason not explained. "Some platforms wrongly use devm_reset_control_get_optional_exclusive(dev, "turnoff") reset_control_assert(imx_pcie->turnoff_reset) and reset_control_deassert(imx_pcie->turnoff_reset) to send out PME_TURN_OFF messge, after change to common API to do that, so remove these wrong implment." Is it okay to put above into commit message? Frank > > - Mani > > -- > மணிவண்ணன் சதாசிவம்
> -----Original Message----- > From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > Sent: 2024年11月15日 15:10 > To: Hongxing Zhu <hongxing.zhu@nxp.com> > Cc: l.stach@pengutronix.de; bhelgaas@google.com; lpieralisi@kernel.org; > kw@linux.com; robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; > shawnguo@kernel.org; Frank Li <frank.li@nxp.com>; > s.hauer@pengutronix.de; festevam@gmail.com; imx@lists.linux.dev; > kernel@pengutronix.de; linux-pci@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org > Subject: Re: [PATCH v6 08/10] PCI: imx6: Use dwc common suspend resume > method > > On Fri, Nov 01, 2024 at 03:06:08PM +0800, Richard Zhu wrote: > > From: Frank Li <Frank.Li@nxp.com> > > > > Call common dwc suspend/resume function. Use dwc common iATU > method to > > send out PME_TURN_OFF message. In Old DWC implementations, > > PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 register is reserved. So > > the generic DWC implementation of sending the PME_Turn_Off message > > using a dummy MMIO write cannot be used. Use previouse method to kick > > off PME_TURN_OFF MSG for these platforms. > > > > Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by > > dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq(). > > > > Since dw_pcie_suspend_noirq() already does these, see below call stack: > > dw_pcie_suspend_noirq() > > dw_pcie_stop_link(); > > imx_pcie_stop_link(); > > pci->pp.ops->deinit(); > > imx_pcie_host_exit(); > > > > Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and > > imx_pcie_start_link() by dw_pcie_resume_noirq() in > > imx_pcie_resume_noirq(). > > > > Since dw_pcie_resume_noirq() already does these, see below call stack: > > dw_pcie_resume_noirq() > > pci->pp.ops->init(); > > imx_pcie_host_init(); > > dw_pcie_setup_rc(); > > dw_pcie_start_link(); > > imx_pcie_start_link(); > > > > Are these two changes (dw_pcie_suspend_noirq(), dw_pcie_resume_noirq()) > related to this patch? If not, these should be in a separate patch. > This commit is used to simple imx_pcie_suspend_noirq() and imx_pcie_resume_noirq() by these replaces. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > --- > > drivers/pci/controller/dwc/pci-imx6.c | 95 > > ++++++++++----------------- > > 1 file changed, 34 insertions(+), 61 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c > > b/drivers/pci/controller/dwc/pci-imx6.c > > index fde2f4eaf804..3c074cc2605f 100644 > > --- a/drivers/pci/controller/dwc/pci-imx6.c > > +++ b/drivers/pci/controller/dwc/pci-imx6.c > > @@ -33,6 +33,7 @@ > > #include <linux/pm_domain.h> > > #include <linux/pm_runtime.h> > > > > +#include "../../pci.h" > > #include "pcie-designware.h" > > > > #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) > > @@ -108,19 +109,18 @@ struct imx_pcie_drvdata { > > int (*init_phy)(struct imx_pcie *pcie); > > int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable); > > int (*core_reset)(struct imx_pcie *pcie, bool assert); > > + const struct dw_pcie_host_ops *ops; > > }; > > > > struct imx_pcie { > > struct dw_pcie *pci; > > struct gpio_desc *reset_gpiod; > > - bool link_is_up; > > struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS]; > > struct regmap *iomuxc_gpr; > > u16 msi_ctrl; > > u32 controller_id; > > struct reset_control *pciephy_reset; > > struct reset_control *apps_reset; > > - struct reset_control *turnoff_reset; > > u32 tx_deemph_gen1; > > u32 tx_deemph_gen2_3p5db; > > u32 tx_deemph_gen2_6db; > > @@ -899,13 +899,11 @@ static int imx_pcie_start_link(struct dw_pcie > *pci) > > dev_info(dev, "Link: Only Gen1 is enabled\n"); > > } > > > > - imx_pcie->link_is_up = true; > > tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); > > dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); > > return 0; > > > > err_reset_phy: > > - imx_pcie->link_is_up = false; > > dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n", > > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), > > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); @@ -1024,9 > +1022,32 @@ > > static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr) > > return cpu_addr - entry->offset; > > } > > > > +/* > > + * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU > > +Ctrl2 > > + * register is reserved. So the generic DWC implementation of sending > > +the > > + * PME_Turn_Off message using a dummy MMIO write cannot be used. > > + */ > > +static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp) { > > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > > + struct imx_pcie *imx_pcie = to_imx_pcie(pci); > > + > > + regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > IMX6SX_GPR12_PCIE_PM_TURN_OFF); > > + regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > > +IMX6SX_GPR12_PCIE_PM_TURN_OFF); > > + > > + usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, > > +PCIE_PME_TO_L2_TIMEOUT_US); } > > + > > + > > Stray newline. Good caught. Thanks. > > > static const struct dw_pcie_host_ops imx_pcie_host_ops = { > > .init = imx_pcie_host_init, > > .deinit = imx_pcie_host_exit, > > + .pme_turn_off = imx_pcie_pme_turn_off, }; > > + > > +static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = { > > + .init = imx_pcie_host_init, > > + .deinit = imx_pcie_host_exit, > > }; > > > > static const struct dw_pcie_ops dw_pcie_ops = { @@ -1147,43 +1168,6 > > @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, > > return 0; > > } > > > > -static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie) -{ > > - struct device *dev = imx_pcie->pci->dev; > > - > > - /* Some variants have a turnoff reset in DT */ > > - if (imx_pcie->turnoff_reset) { > > - reset_control_assert(imx_pcie->turnoff_reset); > > - reset_control_deassert(imx_pcie->turnoff_reset); > > Where these are handled in imx_pcie_pme_turn_off()? If you removed them > intentionally for a reason, it should be mentioned in commit message. > How about add the following descriptions into commit message? SRC interface is used to do the PME_TURN_OFF operations before. It's not very suitable. Now DWC common driver can do the PME_TURN_OFF kick off. Switch to this common methods, and remove the useless turnoff_reset manipulate codes. > > - goto pm_turnoff_sleep; > > - } > > - > > - /* Others poke directly at IOMUXC registers */ > > - switch (imx_pcie->drvdata->variant) { > > - case IMX6SX: > > - case IMX6QP: > > - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > > - IMX6SX_GPR12_PCIE_PM_TURN_OFF, > > - IMX6SX_GPR12_PCIE_PM_TURN_OFF); > > - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > > - IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0); > > - break; > > - default: > > - dev_err(dev, "PME_Turn_Off not implemented\n"); > > - return; > > - } > > - > > - /* > > - * Components with an upstream port must respond to > > - * PME_Turn_Off with PME_TO_Ack but we can't check. > > - * > > - * The standard recommends a 1-10ms timeout after which to > > - * proceed anyway as if acks were received. > > - */ > > -pm_turnoff_sleep: > > - usleep_range(1000, 10000); > > -} > > - > > static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool > > save) { > > u8 offset; > > @@ -1207,36 +1191,26 @@ static void imx_pcie_msi_save_restore(struct > > imx_pcie *imx_pcie, bool save) > > [...] > > > @@ -1267,11 +1241,14 @@ static int imx_pcie_probe(struct > > platform_device *pdev) > > > > pci->dev = dev; > > pci->ops = &dw_pcie_ops; > > - pci->pp.ops = &imx_pcie_host_ops; > > > > imx_pcie->pci = pci; > > imx_pcie->drvdata = of_device_get_match_data(dev); > > > > + pci->pp.ops = &imx_pcie_host_dw_pme_ops; > > + if (imx_pcie->drvdata->ops) > > + pci->pp.ops = imx_pcie->drvdata->ops; > > Use if..else pattern Okay. > > > + > > /* Find the PHY if one is defined, only imx7d uses it */ > > np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); > > if (np) { > > @@ -1343,13 +1320,6 @@ static int imx_pcie_probe(struct > platform_device *pdev) > > break; > > } > > > > - /* Grab turnoff reset */ > > - imx_pcie->turnoff_reset = > devm_reset_control_get_optional_exclusive(dev, "turnoff"); > > - if (IS_ERR(imx_pcie->turnoff_reset)) { > > - dev_err(dev, "Failed to get TURNOFF reset control\n"); > > - return PTR_ERR(imx_pcie->turnoff_reset); > > - } > > - > > Same here. Reason not explained. See above. Best Regards Richard Zhu > > - Mani > > -- > மணிவண்ணன் சதாசிவம்
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index fde2f4eaf804..3c074cc2605f 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -33,6 +33,7 @@ #include <linux/pm_domain.h> #include <linux/pm_runtime.h> +#include "../../pci.h" #include "pcie-designware.h" #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) @@ -108,19 +109,18 @@ struct imx_pcie_drvdata { int (*init_phy)(struct imx_pcie *pcie); int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable); int (*core_reset)(struct imx_pcie *pcie, bool assert); + const struct dw_pcie_host_ops *ops; }; struct imx_pcie { struct dw_pcie *pci; struct gpio_desc *reset_gpiod; - bool link_is_up; struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS]; struct regmap *iomuxc_gpr; u16 msi_ctrl; u32 controller_id; struct reset_control *pciephy_reset; struct reset_control *apps_reset; - struct reset_control *turnoff_reset; u32 tx_deemph_gen1; u32 tx_deemph_gen2_3p5db; u32 tx_deemph_gen2_6db; @@ -899,13 +899,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci) dev_info(dev, "Link: Only Gen1 is enabled\n"); } - imx_pcie->link_is_up = true; tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); return 0; err_reset_phy: - imx_pcie->link_is_up = false; dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n", dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); @@ -1024,9 +1022,32 @@ static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr) return cpu_addr - entry->offset; } +/* + * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 + * register is reserved. So the generic DWC implementation of sending the + * PME_Turn_Off message using a dummy MMIO write cannot be used. + */ +static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp) +{ + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + struct imx_pcie *imx_pcie = to_imx_pcie(pci); + + regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); + regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); + + usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US); +} + + static const struct dw_pcie_host_ops imx_pcie_host_ops = { .init = imx_pcie_host_init, .deinit = imx_pcie_host_exit, + .pme_turn_off = imx_pcie_pme_turn_off, +}; + +static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = { + .init = imx_pcie_host_init, + .deinit = imx_pcie_host_exit, }; static const struct dw_pcie_ops dw_pcie_ops = { @@ -1147,43 +1168,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, return 0; } -static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie) -{ - struct device *dev = imx_pcie->pci->dev; - - /* Some variants have a turnoff reset in DT */ - if (imx_pcie->turnoff_reset) { - reset_control_assert(imx_pcie->turnoff_reset); - reset_control_deassert(imx_pcie->turnoff_reset); - goto pm_turnoff_sleep; - } - - /* Others poke directly at IOMUXC registers */ - switch (imx_pcie->drvdata->variant) { - case IMX6SX: - case IMX6QP: - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6SX_GPR12_PCIE_PM_TURN_OFF, - IMX6SX_GPR12_PCIE_PM_TURN_OFF); - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0); - break; - default: - dev_err(dev, "PME_Turn_Off not implemented\n"); - return; - } - - /* - * Components with an upstream port must respond to - * PME_Turn_Off with PME_TO_Ack but we can't check. - * - * The standard recommends a 1-10ms timeout after which to - * proceed anyway as if acks were received. - */ -pm_turnoff_sleep: - usleep_range(1000, 10000); -} - static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) { u8 offset; @@ -1207,36 +1191,26 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) static int imx_pcie_suspend_noirq(struct device *dev) { struct imx_pcie *imx_pcie = dev_get_drvdata(dev); - struct dw_pcie_rp *pp = &imx_pcie->pci->pp; if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND)) return 0; imx_pcie_msi_save_restore(imx_pcie, true); - imx_pcie_pm_turnoff(imx_pcie); - imx_pcie_stop_link(imx_pcie->pci); - imx_pcie_host_exit(pp); - - return 0; + return dw_pcie_suspend_noirq(imx_pcie->pci); } static int imx_pcie_resume_noirq(struct device *dev) { int ret; struct imx_pcie *imx_pcie = dev_get_drvdata(dev); - struct dw_pcie_rp *pp = &imx_pcie->pci->pp; if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND)) return 0; - ret = imx_pcie_host_init(pp); + ret = dw_pcie_resume_noirq(imx_pcie->pci); if (ret) return ret; imx_pcie_msi_save_restore(imx_pcie, false); - dw_pcie_setup_rc(pp); - - if (imx_pcie->link_is_up) - imx_pcie_start_link(imx_pcie->pci); return 0; } @@ -1267,11 +1241,14 @@ static int imx_pcie_probe(struct platform_device *pdev) pci->dev = dev; pci->ops = &dw_pcie_ops; - pci->pp.ops = &imx_pcie_host_ops; imx_pcie->pci = pci; imx_pcie->drvdata = of_device_get_match_data(dev); + pci->pp.ops = &imx_pcie_host_dw_pme_ops; + if (imx_pcie->drvdata->ops) + pci->pp.ops = imx_pcie->drvdata->ops; + /* Find the PHY if one is defined, only imx7d uses it */ np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); if (np) { @@ -1343,13 +1320,6 @@ static int imx_pcie_probe(struct platform_device *pdev) break; } - /* Grab turnoff reset */ - imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); - if (IS_ERR(imx_pcie->turnoff_reset)) { - dev_err(dev, "Failed to get TURNOFF reset control\n"); - return PTR_ERR(imx_pcie->turnoff_reset); - } - if (imx_pcie->drvdata->gpr) { /* Grab GPR config register range */ imx_pcie->iomuxc_gpr = @@ -1428,6 +1398,7 @@ static int imx_pcie_probe(struct platform_device *pdev) if (ret < 0) return ret; } else { + pci->pp.use_atu_msg = true; ret = dw_pcie_host_init(&pci->pp); if (ret < 0) return ret; @@ -1491,6 +1462,7 @@ static const struct imx_pcie_drvdata drvdata[] = { .init_phy = imx6sx_pcie_init_phy, .enable_ref_clk = imx6sx_pcie_enable_ref_clk, .core_reset = imx6sx_pcie_core_reset, + .ops = &imx_pcie_host_ops, }, [IMX6QP] = { .variant = IMX6QP, @@ -1508,6 +1480,7 @@ static const struct imx_pcie_drvdata drvdata[] = { .init_phy = imx_pcie_init_phy, .enable_ref_clk = imx6q_pcie_enable_ref_clk, .core_reset = imx6qp_pcie_core_reset, + .ops = &imx_pcie_host_ops, }, [IMX7D] = { .variant = IMX7D,